linux-kernel - [PATCH v4 11/13] dt-bindings: tegra: Update csi data-lanes to maximum 8 lanes

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Message-ID: <1607706162-1548-12-git-send-email-skomatineni@nvidia.com>
Date:   Fri, 11 Dec 2020 09:02:40 -0800
From:   Sowjanya Komatineni <skomatineni@...dia.com>
To:     <skomatineni@...dia.com>, <thierry.reding@...il.com>,
        <jonathanh@...dia.com>, <hverkuil@...all.nl>,
        <sakari.ailus@....fi>, <robh+dt@...nel.org>
CC:     <mchehab@...nel.org>, <linux-media@...r.kernel.org>,
        <linux-tegra@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
Subject: [PATCH v4 11/13] dt-bindings: tegra: Update csi data-lanes to maximum 8 lanes

Tegra VI/CSI hardware don't have native 8 lane CSI RX port.

But x8 capture can be supported by using consecutive x4 ports
simultaneously with HDMI-to-CSI bridges where source image is split
on to two x4 ports.

This patch updates dt-bindings for csi endpoint data-lane property
with maximum of 8 lanes.

Acked-by: Rob Herring <robh@...nel.org>
Acked-by: Sakari Ailus <sakari.ailus@...ux.intel.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@...dia.com>
---
 .../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt       | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
index 34d9933..8a6d3e1 100644
--- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
@@ -111,8 +111,8 @@ of the following host1x client modules:
 
 	  endpoint (required node)
 	  Required properties:
-	  - data-lanes: an array of data lane from 1 to 4. Valid array
-	    lengths are 1/2/4.
+	  - data-lanes: an array of data lane from 1 to 8. Valid array
+	    lengths are 1/2/4/8.
 	  - remote-endpoint: phandle to sensor 'endpoint' node.
 
         port@1 (required node)
-- 
2.7.4