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Date:   Sun, 13 Dec 2020 04:40:18 +0200
From:   Vladimir Oltean <>
To:     Andrew Lunn <>,
        Vivien Didelot <>,
        Florian Fainelli <>,
        Jakub Kicinski <>,,,,
        Roopa Prabhu <>,
        Nikolay Aleksandrov <>,
        "David S. Miller" <>
Cc:     DENG Qingfang <>,
        Tobias Waldekranz <>,
        Marek Behun <>,
        Russell King - ARM Linux admin <>,
        Alexandra Winter <>,
        Jiri Pirko <>,
        Ido Schimmel <>,
        Claudiu Manoil <>
Subject: [PATCH v2 net-next 6/6] net: dsa: ocelot: request DSA to fix up lack of address learning on CPU port

Given the following setup:

ip link add br0 type bridge
ip link set eno0 master br0
ip link set swp0 master br0
ip link set swp1 master br0
ip link set swp2 master br0
ip link set swp3 master br0

Currently, packets received on a DSA slave interface (such as swp0)
which should be routed by the software bridge towards a non-switch port
(such as eno0) are also flooded towards the other switch ports (swp1,
swp2, swp3) because the destination is unknown to the hardware switch.

This patch addresses the issue by monitoring the addresses learnt by the
software bridge on eno0, and adding/deleting them as static FDB entries
on the CPU port accordingly.

Signed-off-by: Vladimir Oltean <>
Changes in v2:
Patch is new.

 drivers/net/dsa/ocelot/felix.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/dsa/ocelot/felix.c b/drivers/net/dsa/ocelot/felix.c
index 7dc230677b78..bf48f2e86bcf 100644
--- a/drivers/net/dsa/ocelot/felix.c
+++ b/drivers/net/dsa/ocelot/felix.c
@@ -629,6 +629,7 @@ static int felix_setup(struct dsa_switch *ds)
 	ds->mtu_enforcement_ingress = true;
 	ds->configure_vlan_while_not_filtering = true;
+	ds->learning_broken_on_cpu_port = true;
 	return 0;

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