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Message-ID: <a6cc3d1e-4a72-63be-bf1c-5d560ecef9aa@codeaurora.org>
Date:   Sun, 13 Dec 2020 14:00:25 +0530
From:   Taniya Das <tdas@...eaurora.org>
To:     Stephen Boyd <sboyd@...nel.org>, Vinod Koul <vkoul@...nel.org>
Cc:     linux-arm-msm@...r.kernel.org,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Vivek Aknurwar <viveka@...eaurora.org>,
        Andy Gross <agross@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Rob Herring <robh+dt@...nel.org>, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Jeevan Shriram <jshriram@...eaurora.org>
Subject: Re: [PATCH v2 5/5] clk: qcom: gcc: Add clock driver for SM8350



On 12/11/2020 12:40 PM, Stephen Boyd wrote:
> Quoting Vinod Koul (2020-12-10 21:43:49)
>> On 10-12-20, 12:43, Stephen Boyd wrote:
>>>> +static struct clk_branch gcc_camera_ahb_clk = {
>>>> +       .halt_reg = 0x26004,
>>>> +       .halt_check = BRANCH_HALT_DELAY,
>>>> +       .hwcg_reg = 0x26004,
>>>> +       .hwcg_bit = 1,
>>>> +       .clkr = {
>>>> +               .enable_reg = 0x26004,
>>>> +               .enable_mask = BIT(0),
>>>> +               .hw.init = &(struct clk_init_data){
>>>> +                       .name = "gcc_camera_ahb_clk",
>>>> +                       .flags = CLK_IS_CRITICAL,
>>>
>>> Why is it critical? Can we just enable it in driver probe and stop
>>> modeling it as a clk?
>>
>> it does not have a parent we control, yeah it would make sense to do
>> that. Tanya do you folks agree ..?
>>
> 
> Maybe it is needed for camera clk controller? Have to check other SoCs
> and see if they're using it.
> 

Yes, they would have to be left enabled.

Vinod, could you please move them to probe, similar to kona/sc7180 where 
all the CRITICALs clocks are left enabled?

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