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Message-ID: <20201214094430.m6h3pzhkm3kjl2cl@gilmour>
Date: Mon, 14 Dec 2020 10:44:30 +0100
From: Maxime Ripard <maxime@...no.tech>
To: Andre Przywara <andre.przywara@....com>
Cc: Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...l.net>,
Icenowy Zheng <icenowy@...c.xyz>,
Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh@...nel.org>,
Clément Péron <peron.clem@...il.com>,
Shuosheng Huang <huangshuosheng@...winnertech.com>,
Yangtao Li <tiny.windzz@...il.com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-sunxi@...glegroups.com, linux-gpio@...r.kernel.org
Subject: Re: [PATCH v2 03/21] pinctrl: sunxi: Add support for the Allwinner
H616 pin controller
On Fri, Dec 11, 2020 at 01:19:16AM +0000, Andre Przywara wrote:
> + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
> + SUNXI_FUNCTION(0x0, "gpio_in"),
> + SUNXI_FUNCTION(0x1, "gpio_out"),
> + SUNXI_FUNCTION(0x2, "h_i2s2"), /* MCLK */
> + SUNXI_FUNCTION(0x3, "clock"), /* X32KFOUT */
> + SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 10)), /* PG_EINT10 */
It looks like there's no i2s vs h_i2s issue anymore? Maybe we can just
do s/h_i2s/i2s
> + SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 3),
> + SUNXI_FUNCTION(0x0, "gpio_in"),
> + SUNXI_FUNCTION(0x1, "gpio_out"),
> + SUNXI_FUNCTION(0x2, "emac0"), /* ERXD0 */
> + SUNXI_FUNCTION(0x3, "dmic"), /* DATA2 */
> + SUNXI_FUNCTION(0x4, "h_i2s0"), /* DO0 */
> + SUNXI_FUNCTION(0x5, "h_i2s0_a"), /* DI1 */
> + SUNXI_FUNCTION_IRQ_BANK(0x6, 7, 3)), /* PI_EINT3 */
The way we dealt with this for the A100 is that we put the function as a
suffix which is more natural, so h_i2s0_dout0 and h_i2s0_din1
Maxime
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