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Message-ID: <20201214114159.oqb4o5fdnnmr4n5q@gilmour>
Date: Mon, 14 Dec 2020 12:41:59 +0100
From: Maxime Ripard <maxime@...no.tech>
To: Paul Kocialkowski <paul.kocialkowski@...tlin.com>
Cc: linux-media@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-doc@...r.kernel.org, devel@...verdev.osuosl.org,
linux-sunxi@...glegroups.com, Yong Deng <yong.deng@...ewell.com>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Rob Herring <robh+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...l.net>,
Jonathan Corbet <corbet@....net>,
Kishon Vijay Abraham I <kishon@...com>,
Vinod Koul <vkoul@...nel.org>,
Helen Koike <helen.koike@...labora.com>,
Dafna Hirschfeld <dafna.hirschfeld@...labora.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Sakari Ailus <sakari.ailus@...ux.intel.com>,
Hans Verkuil <hans.verkuil@...co.com>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
kevin.lhopital@...mail.com
Subject: Re: [PATCH v3 13/15] media: sunxi: Add support for the A83T MIPI
CSI-2 controller
On Fri, Dec 11, 2020 at 04:57:06PM +0100, Paul Kocialkowski wrote:
> The A83T supports MIPI CSI-2 with a composite controller, covering
> both the protocol logic and the D-PHY implementation. This controller
> seems to be found on the A83T only and probably was abandoned since.
>
> This implementation splits the protocol and D-PHY registers and
> uses the PHY framework internally. The D-PHY is not registered as a
> standalone PHY driver since it cannot be used with any other
> controller.
>
> There are a few notable points about the controller:
> - The initialisation sequence involes writing specific magic init
> values that do not seem to make any particular sense given the
> concerned register fields;
> - Interrupts appear to be hitting regardless of the interrupt mask
> registers, which can cause a serious flood when transmission errors
> occur.
>
> Only 8-bit and 10-bit Bayer formats are currently supported.
> While up to 4 internal channels to the CSI controller exist, only one
> is currently supported by this implementation.
>
> This work is based on the first version of the driver submitted by
> Kévin L'hôpital, which was adapted to mainline from the Allwinner BSP.
> This version integrates MIPI CSI-2 support as a standalone V4L2 subdev
> instead of merging it in the sun6i-csi driver.
>
> It was tested on a Banana Pi M3 board with an OV8865 sensor in a 4-lane
> configuration.
>
> Signed-off-by: Paul Kocialkowski <paul.kocialkowski@...tlin.com>
> ---
> arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 2 +-
> drivers/media/platform/sunxi/Kconfig | 1 +
> drivers/media/platform/sunxi/Makefile | 1 +
> .../sunxi/sun8i-a83t-mipi-csi2/Kconfig | 11 +
> .../sunxi/sun8i-a83t-mipi-csi2/Makefile | 4 +
> .../sun8i-a83t-mipi-csi2/sun8i_a83t_dphy.c | 92 +++
> .../sun8i-a83t-mipi-csi2/sun8i_a83t_dphy.h | 39 ++
> .../sun8i_a83t_mipi_csi2.c | 657 ++++++++++++++++++
> .../sun8i_a83t_mipi_csi2.h | 197 ++++++
> 9 files changed, 1003 insertions(+), 1 deletion(-)
> create mode 100644 drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/Kconfig
> create mode 100644 drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/Makefile
> create mode 100644 drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/sun8i_a83t_dphy.c
> create mode 100644 drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/sun8i_a83t_dphy.h
> create mode 100644 drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/sun8i_a83t_mipi_csi2.c
> create mode 100644 drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/sun8i_a83t_mipi_csi2.h
>
> diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
> index b437eaeb91e9..bebe843a069b 100644
> --- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
> +++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
> @@ -151,7 +151,7 @@ port@1 {
>
> csi_in_mipi_csi2: endpoint {
> remote-endpoint = <&mipi_csi2_out_csi>;
> - }
> + };
> };
> };
> };
This looks unrelated?
(and there's the same issue with the macros)
Maxime
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