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Message-ID: <CAHD1Q_zKmQawrOQrR3DM0nnBF06nO=L_PcMEQMBvZA6xKMxtWw@mail.gmail.com>
Date:   Mon, 14 Dec 2020 15:32:35 -0300
From:   Guilherme Piccoli <gpiccoli@...onical.com>
To:     Bjorn Helgaas <helgaas@...nel.org>
Cc:     "Eric W. Biederman" <ebiederm@...ssion.com>,
        Thomas Gleixner <tglx@...utronix.de>, lukas@...ner.de,
        linux-pci@...r.kernel.org, Pingfan Liu <kernelfans@...il.com>,
        andi@...stfloor.org, "H. Peter Anvin" <hpa@...or.com>,
        Baoquan He <bhe@...hat.com>,
        "the arch/x86 maintainers" <x86@...nel.org>,
        Sinan Kaya <okaya@...nel.org>, Ingo Molnar <mingo@...hat.com>,
        Jay Vosburgh <jay.vosburgh@...onical.com>,
        Dave Young <dyoung@...hat.com>,
        Gavin Guo <gavin.guo@...onical.com>,
        Borislav Petkov <bp@...en8.de>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Guowen Shan <gshan@...hat.com>,
        "Rafael J. Wysocki" <rjw@...ysocki.net>,
        "Guilherme G. Piccoli" <kernel@...ccoli.net>,
        kexec mailing list <kexec@...ts.infradead.org>,
        LKML <linux-kernel@...r.kernel.org>,
        Dan Streetman <ddstreet@...onical.com>,
        Vivek Goyal <vgoyal@...hat.com>
Subject: Re: [PATCH 1/3] x86/quirks: Scan all busses for early PCI quirks

Thank you for the clarification Bjorn! I was on vacation..sorry for my delay.

Closing the loop here, I understand we're not getting this patch
merged (due to its restriction to domain 0) and there was a suggestion
in the thread of trying to block MSIs from the IOMMU init code (which
also have the restriction of only working in iommu-enabled systems).
Hope the thread is helpful and if somebody faces this issue, can
comment here and at least find this approach, maybe test the patch.

Thanks to all involved!

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