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Date:   Tue, 15 Dec 2020 07:49:15 +0000
From:   wanghuiqiang <>
To:     Shameerali Kolothum Thodi <>,
        "Ard Biesheuvel" <>
CC:     Marc Zyngier <>,
        "" <>,
        "" <>,
        Linuxarm <>, "xuwei (O)" <>
Subject: 答复: [PATCH] irqchip/gic-v3: Check SRE bit for GICv2 legacy support

Sorry response late.
Hi Shameer & Ard,

Could you let me know which firmware you are using? If the difference is Madt table vGIC your pointed , they are the same. We changed the vGIC memory base address at very early design stage.


发件人: Shameerali Kolothum Thodi 
发送时间: 2020年12月2日 16:23
收件人: Ard Biesheuvel <>
抄送: Marc Zyngier <>;;;; Linuxarm <>; wanghuiqiang <>; xuwei (O) <>
主题: RE: [PATCH] irqchip/gic-v3: Check SRE bit for GICv2 legacy support


> -----Original Message-----
> From: Ard Biesheuvel []
> Sent: 30 November 2020 18:32
> To: Shameerali Kolothum Thodi <>
> Cc: Marc Zyngier <>;; 
> Linuxarm <>
> Subject: Re: [PATCH] irqchip/gic-v3: Check SRE bit for GICv2 legacy 
> support

> Any clue why production D06 firmware deviates from the D06 port that 
> exists in Tianocore's edk2-platforms repository? Because that version 
> does not have this bug, and I wonder why that code was upstreamed at 
> all if a substantially different version gets shipped with production 
> hardware.

Ok. Thanks for pointing this out. I have informed our UEFI team about this.
They will check Internally and clarify.


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