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Message-Id: <7126adcc8ffaa0a81caea7354a5eec4f6cd84e7c.1608053262.git.gustavo.pimentel@synopsys.com>
Date: Tue, 15 Dec 2020 18:30:17 +0100
From: Gustavo Pimentel <Gustavo.Pimentel@...opsys.com>
To: Gustavo Pimentel <Gustavo.Pimentel@...opsys.com>,
Dan Williams <dan.j.williams@...el.com>,
Vinod Koul <vkoul@...nel.org>
Cc: dmaengine@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH 08/15] dmaengine: dw-edma: Reorder variables to keep consistency
In the driver code structure, I tried to keep the code style consistency
by writing the write channels instructions first, and then follow by the
read channels instructions, mimicking the hardware implementation.
However, this code style failed in some cases. This patch fixes that and
no functional changes are expected.
Signed-off-by: Gustavo Pimentel <gustavo.pimentel@...opsys.com>
---
drivers/dma/dw-edma/dw-edma-pcie.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c b/drivers/dma/dw-edma/dw-edma-pcie.c
index 2bd31b0..ebb2605 100644
--- a/drivers/dma/dw-edma/dw-edma-pcie.c
+++ b/drivers/dma/dw-edma/dw-edma-pcie.c
@@ -20,8 +20,8 @@
#define DW_PCIE_VSEC_DMA_ID 0x6
#define DW_PCIE_VSEC_DMA_BAR GENMASK(10, 8)
#define DW_PCIE_VSEC_DMA_MAP GENMASK(2, 0)
-#define DW_PCIE_VSEC_DMA_RD_CH GENMASK(25, 16)
#define DW_PCIE_VSEC_DMA_WR_CH GENMASK(9, 0)
+#define DW_PCIE_VSEC_DMA_RD_CH GENMASK(25, 16)
struct dw_edma_pcie_data {
/* eDMA registers location */
@@ -39,8 +39,8 @@ struct dw_edma_pcie_data {
/* Other */
enum dw_edma_map_format mf;
u8 irqs;
- u16 rd_ch_cnt;
u16 wr_ch_cnt;
+ u16 rd_ch_cnt;
};
static const struct dw_edma_pcie_data snps_edda_data = {
@@ -59,8 +59,8 @@ static const struct dw_edma_pcie_data snps_edda_data = {
/* Other */
.mf = EDMA_MF_EDMA_UNROLL,
.irqs = 1,
- .rd_ch_cnt = 0,
.wr_ch_cnt = 0,
+ .rd_ch_cnt = 0,
};
static int dw_edma_pcie_irq_vector(struct device *dev, unsigned int nr)
@@ -99,8 +99,8 @@ static void dw_edma_pcie_get_vsec_dma_data(struct pci_dev *pdev,
pdata->rg_bar = FIELD_GET(DW_PCIE_VSEC_DMA_BAR, val);
pci_read_config_dword(pdev, vsec + 0xc, &val);
- pdata->rd_ch_cnt = FIELD_GET(DW_PCIE_VSEC_DMA_RD_CH, val);
pdata->wr_ch_cnt = FIELD_GET(DW_PCIE_VSEC_DMA_WR_CH, val);
+ pdata->rd_ch_cnt = FIELD_GET(DW_PCIE_VSEC_DMA_RD_CH, val);
pci_read_config_dword(pdev, vsec + 0x14, &val);
off = val;
@@ -216,8 +216,8 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
dw->mf = vsec_data.mf;
dw->nr_irqs = nr_irqs;
dw->ops = &dw_edma_pcie_core_ops;
- dw->rd_ch_cnt = vsec_data.rd_ch_cnt;
dw->wr_ch_cnt = vsec_data.wr_ch_cnt;
+ dw->rd_ch_cnt = vsec_data.rd_ch_cnt;
/* Debug info */
if (dw->mf == EDMA_MF_EDMA_LEGACY)
--
2.7.4
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