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Message-ID: <82c601a9e6c4adac815b2e3c091a2c1ed4daca38.camel@intel.com>
Date: Wed, 16 Dec 2020 16:58:05 +0000
From: "Alessandrelli, Daniele" <daniele.alessandrelli@...el.com>
To: "mgross@...ux.intel.com" <mgross@...ux.intel.com>,
"Healy, MikeX" <mikex.healy@...el.com>,
"herbert@...dor.apana.org.au" <herbert@...dor.apana.org.au>,
"geert+renesas@...der.be" <geert+renesas@...der.be>,
"davem@...emloft.net" <davem@...emloft.net>
CC: "linux-crypto@...r.kernel.org" <linux-crypto@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] crypto: CRYPTO_DEV_KEEMBAY_OCS_AES_SM4 should depend on
ARCH_KEEMBAY
Thanks for the patch.
On Wed, 2020-12-16 at 14:14 +0100, Geert Uytterhoeven wrote:
> The Intel Keem Bay Offload and Crypto Subsystem (OCS) is only present
> on
> Intel Keem Bay SoCs. Hence add a dependency on ARCH_KEEMBAY, to
> prevent
> asking the user about this driver when configuring a kernel without
> Intel Keem Bay platform support.
>
> While at it, fix a misspelling of "cipher".
>
> Fixes: 88574332451380f4 ("crypto: keembay - Add support for Keem Bay
> OCS AES/SM4")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@...der.be>
Acked-by: Daniele Alessandrelli <daniele.alessandrelli@...el.com>
> ---
> drivers/crypto/keembay/Kconfig | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/crypto/keembay/Kconfig
> b/drivers/crypto/keembay/Kconfig
> index 3c16797b25b9497d..6f62c838a3fa0b2e 100644
> --- a/drivers/crypto/keembay/Kconfig
> +++ b/drivers/crypto/keembay/Kconfig
> @@ -1,12 +1,12 @@
> config CRYPTO_DEV_KEEMBAY_OCS_AES_SM4
> tristate "Support for Intel Keem Bay OCS AES/SM4 HW
> acceleration"
> - depends on OF || COMPILE_TEST
> + depends on ARCH_KEEMBAY || COMPILE_TEST
> select CRYPTO_SKCIPHER
> select CRYPTO_AEAD
> select CRYPTO_ENGINE
> help
> Support for Intel Keem Bay Offload and Crypto Subsystem (OCS)
> AES and
> - SM4 cihper hardware acceleration for use with Crypto API.
> + SM4 cipher hardware acceleration for use with Crypto API.
>
> Provides HW acceleration for the following transformations:
> cbc(aes), ctr(aes), ccm(aes), gcm(aes), cbc(sm4), ctr(sm4),
> ccm(sm4)
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