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Message-Id: <20201216174146.10446-1-chang.seok.bae@intel.com>
Date: Wed, 16 Dec 2020 09:41:38 -0800
From: "Chang S. Bae" <chang.seok.bae@...el.com>
To: tglx@...utronix.de, mingo@...nel.org, bp@...e.de, luto@...nel.org,
x86@...nel.org, herbert@...dor.apana.org.au
Cc: dan.j.williams@...el.com, dave.hansen@...el.com,
ravi.v.shankar@...el.com, ning.sun@...el.com,
kumar.n.dwarakanath@...el.com, linux-crypto@...r.kernel.org,
linux-kernel@...r.kernel.org, chang.seok.bae@...el.com
Subject: [RFC PATCH 0/8] x86: Support Intel Key Locker
Key Locker [1][2] is a new security feature available in new Intel CPUs to
protect data encryption keys for the Advanced Encryption Standard
algorithm. The protection limits the amount of time an AES key is exposed
in memory by sealing a key and referencing it with new AES instructions.
The new AES instruction set is a successor of Intel's AES-NI (AES New
Instruction). Users may switch to the Key Locker version from crypto
libraries. This series includes a new AES implementation for the Crypto
API, which was validated through the crypto unit tests. The performance in
the test cases was measured and found comparable to the AES-NI version.
Key Locker introduces a (CPU-)internal key to encode AES keys. The kernel
needs to load it and ensure it unchanged as long as CPUs are operational.
The series has three parts:
* PATCH1-6: Implement the internal key management
* PATCH7: Add AES implementation in Crypto library
* PATCH8: Provide the hardware randomization option for the internal key
This RFC series has been reviewed by Dan Williams, with an open question of
whether to use hardware backup/restore, or to synchronize reinitialize the
internal key over suspend / resume to avoid the implications of key restore
failures.
[1] Intel Architecture Instruction Set Extensions Programming Reference:
https://software.intel.com/content/dam/develop/external/us/en/documents/architecture-instruction-set-$
[2] Intel Key Locker Specification:
https://software.intel.com/content/dam/develop/external/us/en/documents/343965-intel-key-locker-speci$
Chang S. Bae (8):
x86/cpufeature: Enumerate Key Locker feature
x86/cpu: Load Key Locker internal key at boot-time
x86/msr-index: Add MSRs for Key Locker internal key
x86/power: Restore Key Locker internal key from the ACPI S3/4 sleep
states
x86/cpu: Add a config option and a chicken bit for Key Locker
selftests/x86: Test Key Locker internal key maintenance
crypto: x86/aes-kl - Support AES algorithm using Key Locker
instructions
x86/cpu: Support the hardware randomization option for Key Locker
internal key
.../admin-guide/kernel-parameters.txt | 2 +
arch/x86/Kconfig | 14 +
arch/x86/crypto/Makefile | 3 +
arch/x86/crypto/aeskl-intel_asm.S | 881 ++++++++++++++++++
arch/x86/crypto/aeskl-intel_glue.c | 697 ++++++++++++++
arch/x86/include/asm/cpufeatures.h | 1 +
arch/x86/include/asm/disabled-features.h | 8 +-
arch/x86/include/asm/inst.h | 201 ++++
arch/x86/include/asm/keylocker.h | 41 +
arch/x86/include/asm/msr-index.h | 6 +
arch/x86/include/uapi/asm/processor-flags.h | 2 +
arch/x86/kernel/Makefile | 1 +
arch/x86/kernel/cpu/common.c | 66 +-
arch/x86/kernel/cpu/cpuid-deps.c | 1 +
arch/x86/kernel/keylocker.c | 147 +++
arch/x86/kernel/smpboot.c | 2 +
arch/x86/lib/x86-opcode-map.txt | 2 +-
arch/x86/power/cpu.c | 34 +
crypto/Kconfig | 28 +
drivers/char/random.c | 6 +
include/linux/random.h | 2 +
tools/arch/x86/lib/x86-opcode-map.txt | 2 +-
tools/testing/selftests/x86/Makefile | 2 +-
tools/testing/selftests/x86/keylocker.c | 177 ++++
24 files changed, 2321 insertions(+), 5 deletions(-)
create mode 100644 arch/x86/crypto/aeskl-intel_asm.S
create mode 100644 arch/x86/crypto/aeskl-intel_glue.c
create mode 100644 arch/x86/include/asm/keylocker.h
create mode 100644 arch/x86/kernel/keylocker.c
create mode 100644 tools/testing/selftests/x86/keylocker.c
--
2.17.1
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