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Message-ID: <CAMuHMdX+9AGxa8i_tUcZ+81YhrWJc=R9b7wAmt54Q-eEF6qPHQ@mail.gmail.com>
Date: Thu, 17 Dec 2020 12:20:05 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Adam Ford <aford173@...il.com>
Cc: Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
Adam Ford-BE <aford@...conembedded.com>,
Magnus Damm <magnus.damm@...il.com>,
Rob Herring <robh+dt@...nel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 08/18] arm64: dts: renesas: beacon: Enable SCIF4
Hi Adam,
On Sun, Dec 13, 2020 at 7:38 PM Adam Ford <aford173@...il.com> wrote:
> The baseboard supports SCIF4, enable the pins and the node for it.
>
> Signed-off-by: Adam Ford <aford173@...il.com>
Thanks for your patch!
> --- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
> +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
> @@ -578,6 +578,11 @@ pwm2_pins: pwm2 {
> function = "pwm2";
> };
>
> + scif4_pins: scif4 {
> + groups = "scif4_data_c";
> + function = "scif4";
> + };
> +
> sdhi0_pins: sd0 {
> groups = "sdhi0_data4", "sdhi0_ctrl";
> function = "sdhi0";
> @@ -706,6 +711,12 @@ &scif0 {
> status = "okay";
> };
>
> +&scif4 {
> + pinctrl-0 = <&scif4_pins>;
> + pinctrl-names = "default";
> + status = "okay";
> +};
> +
> &scif5 {
> pinctrl-0 = <&scif5_pins>;
> pinctrl-names = "default";
As mixing SCIF ports with and without aliases may lead to failures,
depending on probe order, you want to add an aliases for scif4 to
arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts.
I see you did that for the rzg2h and rzg2n kits, but rzh2m lacks it.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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