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Message-ID: <c0cb782a-bd26-917a-8f39-db8b6f460472@linaro.org>
Date: Thu, 17 Dec 2020 19:28:57 +0100
From: Daniel Lezcano <daniel.lezcano@...aro.org>
To: Dmitry Osipenko <digetx@...il.com>,
Thierry Reding <thierry.reding@...il.com>,
Jonathan Hunter <jonathanh@...dia.com>,
Mark Brown <broonie@...nel.org>,
Liam Girdwood <lgirdwood@...il.com>,
Ulf Hansson <ulf.hansson@...aro.org>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Peter Geis <pgwipeout@...il.com>,
Nicolas Chauvet <kwizart@...il.com>,
Krzysztof Kozlowski <krzk@...nel.org>,
"Rafael J. Wysocki" <rjw@...ysocki.net>,
Kevin Hilman <khilman@...nel.org>,
Peter De Schrijver <pdeschrijver@...dia.com>,
Viresh Kumar <vireshk@...nel.org>,
Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>
Cc: devel@...verdev.osuosl.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, dri-devel@...ts.freedesktop.org,
linux-media@...r.kernel.org, linux-tegra@...r.kernel.org,
linux-clk@...r.kernel.org
Subject: Re: [PATCH v2 48/48] ARM: tegra: cardhu: Support CPU voltage scaling
and thermal throttling
On 17/12/2020 19:06, Dmitry Osipenko wrote:
> Enable CPU voltage scaling and thermal throttling on Tegra30 Cardhu board.
>
> Signed-off-by: Dmitry Osipenko <digetx@...il.com>
> ---
Same comments as 47/48
> arch/arm/boot/dts/tegra30-cardhu.dtsi | 61 ++++++++++++++++++++++++++-
> 1 file changed, 60 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
> index d74c9ca78a7f..08c0ea4e6228 100644
> --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
> +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
> @@ -1,6 +1,9 @@
> // SPDX-License-Identifier: GPL-2.0
> #include <dt-bindings/input/input.h>
> +#include <dt-bindings/thermal/thermal.h>
> #include "tegra30.dtsi"
> +#include "tegra30-cpu-opp.dtsi"
> +#include "tegra30-cpu-opp-microvolt.dtsi"
>
> /**
> * This file contains common DT entry for all fab version of Cardhu.
> @@ -339,12 +342,13 @@ ldo8_reg: ldo8 {
> };
> };
>
> - temperature-sensor@4c {
> + nct1008: temperature-sensor@4c {
> compatible = "onnn,nct1008";
> reg = <0x4c>;
> vcc-supply = <&sys_3v3_reg>;
> interrupt-parent = <&gpio>;
> interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_LEVEL_LOW>;
> + #thermal-sensor-cells = <1>;
> };
>
> vdd_core: tps62361@60 {
> @@ -438,6 +442,29 @@ clk32k_in: clock@0 {
> #clock-cells = <0>;
> };
>
> + cpus {
> + cpu0: cpu@0 {
> + cpu-supply = <&vddctrl_reg>;
> + operating-points-v2 = <&cpu0_opp_table>;
> + #cooling-cells = <2>;
> + };
> +
> + cpu@1 {
> + cpu-supply = <&vddctrl_reg>;
> + operating-points-v2 = <&cpu0_opp_table>;
> + };
> +
> + cpu@2 {
> + cpu-supply = <&vddctrl_reg>;
> + operating-points-v2 = <&cpu0_opp_table>;
> + };
> +
> + cpu@3 {
> + cpu-supply = <&vddctrl_reg>;
> + operating-points-v2 = <&cpu0_opp_table>;
> + };
> + };
> +
> panel: panel {
> compatible = "chunghwa,claa101wb01";
> ddc-i2c-bus = <&panelddc>;
> @@ -617,6 +644,38 @@ sound {
> <&tegra_car TEGRA30_CLK_EXTERN1>;
> };
>
> + thermal-zones {
> + cpu-thermal {
> + polling-delay-passive = <1000>; /* milliseconds */
> + polling-delay = <5000>; /* milliseconds */
> +
> + thermal-sensors = <&nct1008 1>;
> +
> + trips {
> + trip0: cpu-alert0 {
> + /* throttle at 57C until temperature drops to 56.8C */
> + temperature = <57000>;
> + hysteresis = <200>;
> + type = "passive";
> + };
> +
> + trip1: cpu-crit {
> + /* shut down at 60C */
> + temperature = <60000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&trip0>;
> + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> + };
> + };
> +
> gpio-keys {
> compatible = "gpio-keys";
>
>
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