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Message-ID: <160840761391.1580929.14208822809019159327@swboyd.mtv.corp.google.com>
Date:   Sat, 19 Dec 2020 11:53:33 -0800
From:   Stephen Boyd <sboyd@...nel.org>
To:     Claudiu Beznea <claudiu.beznea@...rochip.com>,
        alexandre.belloni@...tlin.com, ludovic.desroches@...rochip.com,
        mturquette@...libre.com, nicolas.ferre@...rochip.com,
        robh+dt@...nel.org
Cc:     linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        Eugen Hristev <eugen.hristev@...rochip.com>,
        Claudiu Beznea <claudiu.beznea@...rochip.com>
Subject: Re: [PATCH v6 03/11] clk: at91: sama7g5: allow SYS and CPU PLLs to be exported and referenced in DT

Quoting Claudiu Beznea (2020-11-19 07:43:09)
> From: Eugen Hristev <eugen.hristev@...rochip.com>
> 
> Allow SYSPLL and CPUPLL to be referenced as a PMC_TYPE_CORE clock
> from phandle in DT.
> 
> Suggested-by: Claudiu Beznea <claudiu.beznea@...rochip.com>
> Signed-off-by: Eugen Hristev <eugen.hristev@...rochip.com>
> [claudiu.beznea@...rochip.com: adapt commit message, add CPU PLL]
> Signed-off-by: Claudiu Beznea <claudiu.beznea@...rochip.com>
> ---

Applied to clk-next

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