linux-kernel - Re: [PATCH] clk: mvebu: a3700: fix the XTAL MODE pin to MPP1

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Date:   Sun, 20 Dec 2020 17:47:17 -0800
From:   Stephen Boyd <sboyd@...nel.org>
To:     Pali Rohár <pali@...nel.org>
Cc:     Gregory CLEMENT <gregory.clement@...tlin.com>,
        Marek Behun <marek.behun@....cz>,
        Michael Turquette <mturquette@...libre.com>,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        Terry Zhou <bjzhou@...vell.com>,
        Konstantin Porotchkin <kostap@...vell.com>
Subject: Re: [PATCH] clk: mvebu: a3700: fix the XTAL MODE pin to MPP1_9

Quoting Pali Rohár (2020-12-20 08:21:35)
> On Saturday 19 December 2020 15:51:30 Stephen Boyd wrote:
> > Quoting Pali Rohár (2020-11-06 02:00:39)
> > > From: Terry Zhou <bjzhou@...vell.com>
> > > 
> > > There is an error in the current code that the XTAL MODE
> > > pin was set to NB MPP1_31 which should be NB MPP1_9.
> > > The latch register of NB MPP1_9 has different offset of 0x8.
> > > 
> > > Signed-off-by: Terry Zhou <bjzhou@...vell.com>
> > > [pali: Fix pin name in commit message]
> > > Signed-off-by: Pali Rohár <pali@...nel.org>
> > > Fixes: 7ea8250406a6 ("clk: mvebu: Add the xtal clock for Armada 3700 SoC")
> > > Cc: stable@...r.kernel.org
> > > 
> > > ---
> > 
> > Applied to clk-next
> 
> Hello Stephen! As this is fix also for stable releases, could you please
> queue this patch for 5.11 release?

No problem.