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Message-ID: <CAHp75VfTiBHJfGPMQJW5K1zcVYKbQHBP=gNsTn0Kah1M92Ok2w@mail.gmail.com>
Date: Mon, 21 Dec 2020 19:28:02 +0200
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Alexandru Ardelean <alexandru.ardelean@...log.com>
Cc: linux-spi <linux-spi@...r.kernel.org>,
devicetree <devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
"Bogdan, Dragos" <dragos.bogdan@...log.com>,
Mark Brown <broonie@...nel.org>,
Rob Herring <robh+dt@...nel.org>
Subject: Re: [PATCH v6 2/3] spi: Add SPI_NO_TX/RX support
On Mon, Dec 21, 2020 at 5:25 PM Alexandru Ardelean
<alexandru.ardelean@...log.com> wrote:
>
> From: Dragos Bogdan <dragos.bogdan@...log.com>
>
> Transmit/receive only is a valid SPI mode. For example, the MOSI/TX line
> might be missing from an ADC while for a DAC the MISO/RX line may be
> optional. This patch adds these two new modes: SPI_NO_TX and
> SPI_NO_RX. This way, the drivers will be able to identify if any of
> these two lines is missing and to adjust the transfers accordingly.
Reviewed-by: Andy Shevchenko <andy.shevchenko@...il.com>
> Signed-off-by: Dragos Bogdan <dragos.bogdan@...log.com>
> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@...log.com>
> ---
>
> Changelog v5 -> v6:
> * https://patchwork.kernel.org/project/spi-devel-general/patch/20201221141906.48922-2-alexandru.ardelean@analog.com/
> * merged on single line message:
> "setup: can not select any two of dual, quad and no-rx/tx at the same time\n"
> * not adding Reviewed-by: tag for Andy yet, since there was a nit
>
> drivers/spi/spi.c | 25 ++++++++++++++++++++-----
> include/linux/spi/spi.h | 17 +++++++++++++++++
> include/uapi/linux/spi/spi.h | 10 ++++++++++
> 3 files changed, 47 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
> index 51d7c004fbab..ca75f4036eda 100644
> --- a/drivers/spi/spi.c
> +++ b/drivers/spi/spi.c
> @@ -1941,6 +1941,9 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
> /* Device DUAL/QUAD mode */
> if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) {
> switch (value) {
> + case 0:
> + spi->mode |= SPI_NO_TX;
> + break;
> case 1:
> break;
> case 2:
> @@ -1962,6 +1965,9 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
>
> if (!of_property_read_u32(nc, "spi-rx-bus-width", &value)) {
> switch (value) {
> + case 0:
> + spi->mode |= SPI_NO_RX;
> + break;
> case 1:
> break;
> case 2:
> @@ -3329,12 +3335,16 @@ int spi_setup(struct spi_device *spi)
> unsigned bad_bits, ugly_bits;
> int status;
>
> - /* check mode to prevent that DUAL and QUAD set at the same time
> + /*
> + * check mode to prevent that any two of DUAL, QUAD and NO_MOSI/MISO
> + * are set at the same time
> */
> - if (((spi->mode & SPI_TX_DUAL) && (spi->mode & SPI_TX_QUAD)) ||
> - ((spi->mode & SPI_RX_DUAL) && (spi->mode & SPI_RX_QUAD))) {
> + if ((hweight_long(spi->mode &
> + (SPI_TX_DUAL | SPI_TX_QUAD | SPI_NO_TX)) > 1) ||
> + (hweight_long(spi->mode &
> + (SPI_RX_DUAL | SPI_RX_QUAD | SPI_NO_RX)) > 1)) {
> dev_err(&spi->dev,
> - "setup: can not select dual and quad at the same time\n");
> + "setup: can not select any two of dual, quad and no-rx/tx at the same time\n");
> return -EINVAL;
> }
> /* if it is SPI_3WIRE mode, DUAL and QUAD should be forbidden
> @@ -3348,7 +3358,8 @@ int spi_setup(struct spi_device *spi)
> * SPI_CS_WORD has a fallback software implementation,
> * so it is ignored here.
> */
> - bad_bits = spi->mode & ~(spi->controller->mode_bits | SPI_CS_WORD);
> + bad_bits = spi->mode & ~(spi->controller->mode_bits | SPI_CS_WORD |
> + SPI_NO_TX | SPI_NO_RX);
> /* nothing prevents from working with active-high CS in case if it
> * is driven by GPIO.
> */
> @@ -3610,6 +3621,8 @@ static int __spi_validate(struct spi_device *spi, struct spi_message *message)
> * 2. check tx/rx_nbits match the mode in spi_device
> */
> if (xfer->tx_buf) {
> + if (spi->mode & SPI_NO_TX)
> + return -EINVAL;
> if (xfer->tx_nbits != SPI_NBITS_SINGLE &&
> xfer->tx_nbits != SPI_NBITS_DUAL &&
> xfer->tx_nbits != SPI_NBITS_QUAD)
> @@ -3623,6 +3636,8 @@ static int __spi_validate(struct spi_device *spi, struct spi_message *message)
> }
> /* check transfer rx_nbits */
> if (xfer->rx_buf) {
> + if (spi->mode & SPI_NO_RX)
> + return -EINVAL;
> if (xfer->rx_nbits != SPI_NBITS_SINGLE &&
> xfer->rx_nbits != SPI_NBITS_DUAL &&
> xfer->rx_nbits != SPI_NBITS_QUAD)
> diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
> index a08c3f37e202..9bfdfaf286eb 100644
> --- a/include/linux/spi/spi.h
> +++ b/include/linux/spi/spi.h
> @@ -6,6 +6,7 @@
> #ifndef __LINUX_SPI_H
> #define __LINUX_SPI_H
>
> +#include <linux/bits.h>
> #include <linux/device.h>
> #include <linux/mod_devicetable.h>
> #include <linux/slab.h>
> @@ -166,6 +167,18 @@ struct spi_device {
> u8 chip_select;
> u8 bits_per_word;
> bool rt;
> +#define SPI_NO_TX BIT(31) /* no transmit wire */
> +#define SPI_NO_RX BIT(30) /* no receive wire */
> + /*
> + * All bits defined above should be covered by SPI_MODE_KERNEL_MASK.
> + * The SPI_MODE_KERNEL_MASK has the SPI_MODE_USER_MASK counterpart,
> + * which is defined in 'include/uapi/linux/spi/spi.h'.
> + * The bits defined here are from bit 31 downwards, while in
> + * SPI_MODE_USER_MASK are from 0 upwards.
> + * These bits must not overlap. A static assert check should make sure of that.
> + * If adding extra bits, make sure to decrease the bit index below as well.
> + */
> +#define SPI_MODE_KERNEL_MASK (~(BIT(30) - 1))
> u32 mode;
> int irq;
> void *controller_state;
> @@ -189,6 +202,10 @@ struct spi_device {
> */
> };
>
> +/* Make sure that SPI_MODE_KERNEL_MASK & SPI_MODE_USER_MASK don't overlap */
> +static_assert((SPI_MODE_KERNEL_MASK & SPI_MODE_USER_MASK) == 0,
> + "SPI_MODE_USER_MASK & SPI_MODE_KERNEL_MASK must not overlap");
> +
> static inline struct spi_device *to_spi_device(struct device *dev)
> {
> return dev ? container_of(dev, struct spi_device, dev) : NULL;
> diff --git a/include/uapi/linux/spi/spi.h b/include/uapi/linux/spi/spi.h
> index 703b586f35df..236a85f08ded 100644
> --- a/include/uapi/linux/spi/spi.h
> +++ b/include/uapi/linux/spi/spi.h
> @@ -28,4 +28,14 @@
> #define SPI_RX_OCTAL _BITUL(14) /* receive with 8 wires */
> #define SPI_3WIRE_HIZ _BITUL(15) /* high impedance turnaround */
>
> +/*
> + * All the bits defined above should be covered by SPI_MODE_USER_MASK.
> + * The SPI_MODE_USER_MASK has the SPI_MODE_KERNEL_MASK counterpart in
> + * 'include/linux/spi/spi.h'. The bits defined here are from bit 0 upwards
> + * while in SPI_MODE_KERNEL_MASK they are from the other end downwards.
> + * These bits must not overlap. A static assert check should make sure of that.
> + * If adding extra bits, make sure to increase the bit index below as well.
> + */
> +#define SPI_MODE_USER_MASK (_BITUL(16) - 1)
> +
> #endif /* _UAPI_SPI_H */
> --
> 2.17.1
>
--
With Best Regards,
Andy Shevchenko
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