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Date: Fri, 25 Dec 2020 18:03:04 +0800 From: Jianjun Wang <jianjun.wang@...iatek.com> To: Bjorn Helgaas <bhelgaas@...gle.com>, Rob Herring <robh+dt@...nel.org>, Lorenzo Pieralisi <lorenzo.pieralisi@....com>, Ryder Lee <ryder.lee@...iatek.com> CC: Philipp Zabel <p.zabel@...gutronix.de>, Matthias Brugger <matthias.bgg@...il.com>, <linux-pci@...r.kernel.org>, <linux-mediatek@...ts.infradead.org>, <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>, Sj Huang <sj.huang@...iatek.com>, Jianjun Wang <jianjun.wang@...iatek.com>, <youlin.pei@...iatek.com>, <chuanjia.liu@...iatek.com>, <qizhong.cheng@...iatek.com>, <sin_jieyang@...iatek.com>, <Project_Global_Chrome_Upstream_Group@...iatek.com>, <drinkcat@...omium.org> Subject: [v6,0/4] PCI: mediatek: Add new generation controller support These series patches add pcie-mediatek-gen3.c and dt-bindings file to support new generation PCIe controller. Changes in v6: 1. Export pci_pio_to_address() to support compiling as kernel module; 2. Replace usleep_range(100 * 1000, 120 * 1000) with msleep(100); 3. Replace dev_notice with dev_err; 4. Fix MSI get hwirq flow; 5. Fix warning for possible recursive locking in mtk_pcie_set_affinity. Changes in v5: 1. Remove unused macros 2. Modify the config read/write callbacks, set the config byte field in TLP header and use pci_generic_config_read32/write32 to access the config space 3. Fix the settings of translation window, both MEM and IO regions works properly 4. Fix typos Changes in v4: 1. Fix PCIe power up/down flow 2. Use "mac" and "phy" for reset names 3. Add clock names 4. Fix the variables type Changes in v3: 1. Remove standard property in binding document 2. Return error number when get_optional* API throws an error 3. Use the bulk clk APIs Changes in v2: 1. Fix the typo of dt-bindings patch 2. Remove the unnecessary properties in binding document 3. dispos the irq mappings of msi top domain when irq teardown Jianjun Wang (4): dt-bindings: PCI: mediatek: Add YAML schema PCI: Export pci_pio_to_address() for module use PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192 MAINTAINERS: Add Jianjun Wang as MediaTek PCI co-maintainer .../bindings/pci/mediatek-pcie-gen3.yaml | 135 ++ MAINTAINERS | 1 + drivers/pci/controller/Kconfig | 13 + drivers/pci/controller/Makefile | 1 + drivers/pci/controller/pcie-mediatek-gen3.c | 1084 +++++++++++++++++ drivers/pci/pci.c | 1 + 6 files changed, 1235 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml create mode 100644 drivers/pci/controller/pcie-mediatek-gen3.c -- 2.25.1
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