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Date:   Sat, 26 Dec 2020 11:31:07 +0800
From:   Jiaxun Yang <jiaxun.yang@...goat.com>
To:     Qing Zhang <zhangqing@...ngson.cn>,
        Mark Brown <broonie@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        ThomasBogendoerfer <tsbogend@...ha.franken.de>
Cc:     linux-spi@...r.kernel.org, Huacai Chen <chenhc@...ote.com>,
        devicetree@...r.kernel.org, linux-mips@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 2/4] spi: ls7a: Add YAML schemas

在 2020/12/25 下午6:35, Qing Zhang 写道:
> Switch the DT binding to a YAML schema to enable the DT validation.
>
> Signed-off-by: Qing Zhang <zhangqing@...ngson.cn>
> ---
>
> v4: fix warnings/errors about running 'make dt_binding_check'
>
> ---
>   .../devicetree/bindings/spi/loongson,spi-ls7a.yaml | 46 ++++++++++++++++++++++
>   1 file changed, 46 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/spi/loongson,spi-ls7a.yaml
>
> diff --git a/Documentation/devicetree/bindings/spi/loongson,spi-ls7a.yaml b/Documentation/devicetree/bindings/spi/loongson,spi-ls7a.yaml
> new file mode 100644
> index 0000000..8cc9bc5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/loongson,spi-ls7a.yaml
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/loongson,spi-ls7a.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Loongson LS7A PCH SPI Controller
> +
> +maintainers:
> +  - Qing Zhang <zhangqing@...ngson.cn>
> +
> +description: |
> +  This controller can be found in Loongson-3 systems with LS7A PCH.
> +
> +properties:
> +  compatible:
> +    const: loongson,ls7a-spi
> +
> +  reg:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - num-chipselects

num-chipselects never parsed in code?

Thanks.

- Jiaxun



> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    pci {
> +        #address-cells = <3>;
> +        #size-cells = <2>;
> +
> +        spi@16,0 {
> +        compatible = "pci0014,7a0b.0",
> +                        "pci0014,7a0b",
> +                        "pciclass088000",
> +                        "pciclass0800";
> +
> +        reg = <0xb000 0x0 0x0 0x0 0x0>;
> +        num-chipselects = <0>;
> +        };
> +    };
> +
> +...

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