linux-kernel - [PATCH 5.10 177/717] PCI: brcmstb: Initialize "tmp" before use

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Message-Id: <20201228125029.445272963@linuxfoundation.org>
Date:   Mon, 28 Dec 2020 13:42:55 +0100
From:   Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To:     linux-kernel@...r.kernel.org
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        stable@...r.kernel.org,
        Rafał Miłecki <zajec5@...il.com>,
        Jim Quinlan <james.quinlan@...adcom.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Nicolas Saenz Julienne <nsaenzjulienne@...e.de>,
        Florian Fainelli <f.fainelli@...il.com>,
        Sasha Levin <sashal@...nel.org>
Subject: [PATCH 5.10 177/717] PCI: brcmstb: Initialize "tmp" before use

From: Jim Quinlan <james.quinlan@...adcom.com>

[ Upstream commit ddaff0af653136ee1e0b49116ecf2988c2fc64ca ]

The variable 'tmp' is used multiple times in the brcm_pcie_setup()
function.  One such usage did not initialize 'tmp' to the current value
of the target register.  By luck the mistake does not currently affect
behavior;  regardless 'tmp' is now initialized properly.

Suggested-by: Rafał Miłecki <zajec5@...il.com>
Link: https://lore.kernel.org/r/20201102205712.23332-1-james.quinlan@broadcom.com
Fixes: c0452137034b ("PCI: brcmstb: Add Broadcom STB PCIe host controller driver")
Signed-off-by: Jim Quinlan <james.quinlan@...adcom.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
Acked-by: Nicolas Saenz Julienne <nsaenzjulienne@...e.de>
Acked-by: Florian Fainelli <f.fainelli@...il.com>
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
 drivers/pci/controller/pcie-brcmstb.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
index bea86899bd5df..9c3d2982248d3 100644
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
@@ -893,6 +893,7 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
 		burst = 0x2; /* 512 bytes */
 
 	/* Set SCB_MAX_BURST_SIZE, CFG_READ_UR_MODE, SCB_ACCESS_EN */
+	tmp = readl(base + PCIE_MISC_MISC_CTRL);
 	u32p_replace_bits(&tmp, 1, PCIE_MISC_MISC_CTRL_SCB_ACCESS_EN_MASK);
 	u32p_replace_bits(&tmp, 1, PCIE_MISC_MISC_CTRL_CFG_READ_UR_MODE_MASK);
 	u32p_replace_bits(&tmp, burst, PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_MASK);
-- 
2.27.0