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Date:   Tue, 29 Dec 2020 20:42:50 +0100
From:   Bas Nieuwenhuizen <bas@...nieuwenhuizen.nl>
To:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc:     LKML <linux-kernel@...r.kernel.org>, stable@...r.kernel.org,
        Alex Deucher <alexander.deucher@....com>,
        Nicholas Kazlauskas <nicholas.kazlauskas@....com>
Subject: Re: [PATCH 5.10 635/717] drm/amd/display: Honor the offset for plane 0.

Hi Greg,

Someone bisected a non-booting computer with 5.10.4-rc1 to this
commit. Would it be possible to back out of backporting this commit
(was backported to 5.4 and 5.10)? I suspect we may need
53f4cb8b5580a20d01449a7d8e1cbfdaed9ff6b6 to be picked too to avoid
regressing, but I'm not sure about process (e.g. timeline to confirm
things) here and a not booting computer is really bad.

Thanks,
Bas

On Mon, Dec 28, 2020 at 3:28 PM Greg Kroah-Hartman
<gregkh@...uxfoundation.org> wrote:
>
> From: Bas Nieuwenhuizen <bas@...nieuwenhuizen.nl>
>
> commit be7b9b327e79cd2db07b659af599867b629b2f66 upstream.
>
> With modifiers I'd like to support non-dedicated buffers for
> images.
>
> Signed-off-by: Bas Nieuwenhuizen <bas@...nieuwenhuizen.nl>
> Reviewed-by: Alex Deucher <alexander.deucher@....com>
> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@....com>
> Cc: stable@...r.kernel.org # 5.1.0
> Signed-off-by: Alex Deucher <alexander.deucher@....com>
> Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
>
> ---
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   14 +++++++++-----
>  1 file changed, 9 insertions(+), 5 deletions(-)
>
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -3746,6 +3746,7 @@ fill_plane_dcc_attributes(struct amdgpu_
>         struct dc *dc = adev->dm.dc;
>         struct dc_dcc_surface_param input;
>         struct dc_surface_dcc_cap output;
> +       uint64_t plane_address = afb->address + afb->base.offsets[0];
>         uint32_t offset = AMDGPU_TILING_GET(info, DCC_OFFSET_256B);
>         uint32_t i64b = AMDGPU_TILING_GET(info, DCC_INDEPENDENT_64B) != 0;
>         uint64_t dcc_address;
> @@ -3789,7 +3790,7 @@ fill_plane_dcc_attributes(struct amdgpu_
>                 AMDGPU_TILING_GET(info, DCC_PITCH_MAX) + 1;
>         dcc->independent_64b_blks = i64b;
>
> -       dcc_address = get_dcc_address(afb->address, info);
> +       dcc_address = get_dcc_address(plane_address, info);
>         address->grph.meta_addr.low_part = lower_32_bits(dcc_address);
>         address->grph.meta_addr.high_part = upper_32_bits(dcc_address);
>
> @@ -3820,6 +3821,8 @@ fill_plane_buffer_attributes(struct amdg
>         address->tmz_surface = tmz_surface;
>
>         if (format < SURFACE_PIXEL_FORMAT_VIDEO_BEGIN) {
> +               uint64_t addr = afb->address + fb->offsets[0];
> +
>                 plane_size->surface_size.x = 0;
>                 plane_size->surface_size.y = 0;
>                 plane_size->surface_size.width = fb->width;
> @@ -3828,9 +3831,10 @@ fill_plane_buffer_attributes(struct amdg
>                         fb->pitches[0] / fb->format->cpp[0];
>
>                 address->type = PLN_ADDR_TYPE_GRAPHICS;
> -               address->grph.addr.low_part = lower_32_bits(afb->address);
> -               address->grph.addr.high_part = upper_32_bits(afb->address);
> +               address->grph.addr.low_part = lower_32_bits(addr);
> +               address->grph.addr.high_part = upper_32_bits(addr);
>         } else if (format < SURFACE_PIXEL_FORMAT_INVALID) {
> +               uint64_t luma_addr = afb->address + fb->offsets[0];
>                 uint64_t chroma_addr = afb->address + fb->offsets[1];
>
>                 plane_size->surface_size.x = 0;
> @@ -3851,9 +3855,9 @@ fill_plane_buffer_attributes(struct amdg
>
>                 address->type = PLN_ADDR_TYPE_VIDEO_PROGRESSIVE;
>                 address->video_progressive.luma_addr.low_part =
> -                       lower_32_bits(afb->address);
> +                       lower_32_bits(luma_addr);
>                 address->video_progressive.luma_addr.high_part =
> -                       upper_32_bits(afb->address);
> +                       upper_32_bits(luma_addr);
>                 address->video_progressive.chroma_addr.low_part =
>                         lower_32_bits(chroma_addr);
>                 address->video_progressive.chroma_addr.high_part =
>
>

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