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Message-Id: <99b1f6772064a6fafdc0fd857bc22ff9976241eb.1609263738.git.cristian.ciocaltea@gmail.com>
Date: Tue, 29 Dec 2020 23:17:27 +0200
From: Cristian Ciocaltea <cristian.ciocaltea@...il.com>
To: Rob Herring <robh+dt@...nel.org>,
Andreas Färber <afaerber@...e.de>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-actions@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH v3 12/13] arm: dts: owl-s500-roseapplepi: Add I2C pinctrl configuration
Add pinctrl definitions for the I2C controllers used in RoseapplePi SBC.
For the moment enable only I2C0, which is used by the ATC2603C PMIC.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@...il.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
---
Changes in v3:
- Added Reviewed-by from Mani
arch/arm/boot/dts/owl-s500-roseapplepi.dts | 44 ++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
index fe9ae3619422..ff91561ca99c 100644
--- a/arch/arm/boot/dts/owl-s500-roseapplepi.dts
+++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
@@ -37,7 +37,51 @@ sd_vcc: sd-vcc {
};
};
+&i2c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+};
+
+&i2c1 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+};
+
+&i2c2 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins>;
+};
+
&pinctrl {
+ i2c0_pins: i2c0-pins {
+ pinmux {
+ groups = "i2c0_mfp";
+ function = "i2c0";
+ };
+
+ pinconf {
+ pins = "i2c0_sclk", "i2c0_sdata";
+ bias-pull-up;
+ };
+ };
+
+ i2c1_pins: i2c1-pins {
+ pinconf {
+ pins = "i2c1_sclk", "i2c1_sdata";
+ bias-pull-up;
+ };
+ };
+
+ i2c2_pins: i2c2-pins {
+ pinconf {
+ pins = "i2c2_sclk", "i2c2_sdata";
+ bias-pull-up;
+ };
+ };
+
mmc0_pins: mmc0-pins {
pinmux {
groups = "sd0_d0_mfp", "sd0_d1_mfp", "sd0_d2_d3_mfp",
--
2.30.0
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