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Date:   Thu, 31 Dec 2020 11:12:15 -0700
From:   Rob Herring <robh@...nel.org>
To:     Roger Lu <roger.lu@...iatek.com>
Cc:     Matthias Brugger <matthias.bgg@...il.com>,
        Enric Balletbo Serra <eballetbo@...il.com>,
        Kevin Hilman <khilman@...nel.org>,
        Nicolas Boichat <drinkcat@...gle.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Fan Chen <fan.chen@...iatek.com>,
        HenryC Chen <HenryC.Chen@...iatek.com>,
        YT Lee <yt.lee@...iatek.com>,
        Xiaoqing Liu <Xiaoqing.Liu@...iatek.com>,
        Charles Yang <Charles.Yang@...iatek.com>,
        Angus Lin <Angus.Lin@...iatek.com>,
        Mark Rutland <mark.rutland@....com>,
        Nishanth Menon <nm@...com>, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-pm@...r.kernel.org
Subject: Re: [PATCH v10 1/7] [v10,1/7]: dt-bindings: soc: mediatek: add mtk
 svs dt-bindings

On Sun, Dec 27, 2020 at 06:54:43PM +0800, Roger Lu wrote:
> Document the binding for enabling mtk svs on MediaTek SoC.
> 
> Signed-off-by: Roger Lu <roger.lu@...iatek.com>
> ---
>  .../bindings/soc/mediatek/mtk-svs.yaml        | 75 +++++++++++++++++++
>  1 file changed, 75 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml
> 
> diff --git a/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml
> new file mode 100644
> index 000000000000..9c7da0acd82f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml
> @@ -0,0 +1,75 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/mediatek/mtk-svs.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Introduce MTK SVS engine
> +
> +maintainers:
> +  - Matthias Brugger <matthias.bgg@...il.com>
> +  - Kevin Hilman <khilman@...nel.org>
> +  - Nishanth Menon <nm@...com>
> +
> +description: |+
> +  The Smart Voltage Scaling(SVS) engine is a piece of hardware
> +  which has several controllers(banks) for calculating suitable
> +  voltage to different power domains(CPU/GPU/CCI) according to
> +  chip process corner, temperatures and other factors. Then DVFS
> +  driver could apply SVS bank voltage to PMIC/Buck.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - mediatek,mt8183-svs
> +
> +  reg:
> +    description: Address range of the MTK SVS controller.

Drop. That doesn't really add anything.

> +    maxItems: 1
> +
> +  interrupts:
> +    description: IRQ for the MTK SVS controller.

Drop.

> +    maxItems: 1
> +
> +  clocks:
> +    description: Main clock for MTK SVS controller to work.

Drop, but you need:

maxItems: 1

> +
> +  clock-names:
> +    const: main
> +
> +  nvmem-cells:
> +    maxItems: 2
> +    description:
> +      Phandle to the calibration data provided by a nvmem device.

Drop.

> +
> +  nvmem-cell-names:
> +    items:
> +      - const: svs-calibration-data
> +      - const: t-calibration-data
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +  - clock-names
> +  - nvmem-cells
> +  - nvmem-cell-names
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/mt8183-clk.h>
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +
> +    svs: svs@...0b000 {
> +        compatible = "mediatek,mt8183-svs";
> +        reg = <0 0x1100b000 0 0x1000>;
> +        interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;
> +        clocks = <&infracfg CLK_INFRA_THERM>;
> +        clock-names = "main";
> +        nvmem-cells = <&svs_calibration>, <&thermal_calibration>;
> +        nvmem-cell-names = "svs-calibration-data", "t-calibration-data";
> +    };
> -- 
> 2.18.0
> 

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