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Message-ID: <202101050534.bpJqYtR2-lkp@intel.com>
Date: Tue, 5 Jan 2021 05:57:38 +0800
From: kernel test robot <lkp@...el.com>
To: Jiaxun Yang <jiaxun.yang@...goat.com>
Cc: kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Huacai Chen <chenhc@...ote.com>, Marc Zyngier <maz@...nel.org>
Subject: drivers/irqchip/irq-loongson-liointc.c:134:12: warning: no previous
prototype for 'liointc_of_init'
Hi Jiaxun,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: e71ba9452f0b5b2e8dc8aa5445198cd9214a6a62
commit: dbb152267908c4b2c3639492a94b6838821bc195 irqchip: Add driver for Loongson I/O Local Interrupt Controller
date: 10 months ago
config: mips-randconfig-r036-20210105 (attached as .config)
compiler: mips64el-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=dbb152267908c4b2c3639492a94b6838821bc195
git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout dbb152267908c4b2c3639492a94b6838821bc195
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=mips
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
All warnings (new ones prefixed by >>):
>> drivers/irqchip/irq-loongson-liointc.c:134:12: warning: no previous prototype for 'liointc_of_init' [-Wmissing-prototypes]
134 | int __init liointc_of_init(struct device_node *node,
| ^~~~~~~~~~~~~~~
vim +/liointc_of_init +134 drivers/irqchip/irq-loongson-liointc.c
133
> 134 int __init liointc_of_init(struct device_node *node,
135 struct device_node *parent)
136 {
137 struct irq_chip_generic *gc;
138 struct irq_domain *domain;
139 struct irq_chip_type *ct;
140 struct liointc_priv *priv;
141 void __iomem *base;
142 u32 of_parent_int_map[LIOINTC_NUM_PARENT];
143 int parent_irq[LIOINTC_NUM_PARENT];
144 bool have_parent = FALSE;
145 int sz, i, err = 0;
146
147 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
148 if (!priv)
149 return -ENOMEM;
150
151 base = of_iomap(node, 0);
152 if (!base) {
153 err = -ENODEV;
154 goto out_free_priv;
155 }
156
157 for (i = 0; i < LIOINTC_NUM_PARENT; i++) {
158 parent_irq[i] = of_irq_get_byname(node, parent_names[i]);
159 if (parent_irq[i] > 0)
160 have_parent = TRUE;
161 }
162 if (!have_parent) {
163 err = -ENODEV;
164 goto out_iounmap;
165 }
166
167 sz = of_property_read_variable_u32_array(node,
168 "loongson,parent_int_map",
169 &of_parent_int_map[0],
170 LIOINTC_NUM_PARENT,
171 LIOINTC_NUM_PARENT);
172 if (sz < 4) {
173 pr_err("loongson-liointc: No parent_int_map\n");
174 err = -ENODEV;
175 goto out_iounmap;
176 }
177
178 for (i = 0; i < LIOINTC_NUM_PARENT; i++)
179 priv->handler[i].parent_int_map = of_parent_int_map[i];
180
181 /* Setup IRQ domain */
182 domain = irq_domain_add_linear(node, 32,
183 &irq_generic_chip_ops, priv);
184 if (!domain) {
185 pr_err("loongson-liointc: cannot add IRQ domain\n");
186 err = -EINVAL;
187 goto out_iounmap;
188 }
189
190 err = irq_alloc_domain_generic_chips(domain, 32, 1,
191 node->full_name, handle_level_irq,
192 IRQ_NOPROBE, 0, 0);
193 if (err) {
194 pr_err("loongson-liointc: unable to register IRQ domain\n");
195 goto out_free_domain;
196 }
197
198
199 /* Disable all IRQs */
200 writel(0xffffffff, base + LIOINTC_REG_INTC_DISABLE);
201 /* Set to level triggered */
202 writel(0x0, base + LIOINTC_REG_INTC_EDGE);
203
204 /* Generate parent INT part of map cache */
205 for (i = 0; i < LIOINTC_NUM_PARENT; i++) {
206 u32 pending = priv->handler[i].parent_int_map;
207
208 while (pending) {
209 int bit = __ffs(pending);
210
211 priv->map_cache[bit] = BIT(i) << LIOINTC_SHIFT_INTx;
212 pending &= ~BIT(bit);
213 }
214 }
215
216 for (i = 0; i < LIOINTC_CHIP_IRQ; i++) {
217 /* Generate core part of map cache */
218 priv->map_cache[i] |= BIT(loongson_sysconf.boot_cpu_id);
219 writeb(priv->map_cache[i], base + i);
220 }
221
222 gc = irq_get_domain_generic_chip(domain, 0);
223 gc->private = priv;
224 gc->reg_base = base;
225 gc->domain = domain;
226 gc->resume = liointc_resume;
227
228 ct = gc->chip_types;
229 ct->regs.enable = LIOINTC_REG_INTC_ENABLE;
230 ct->regs.disable = LIOINTC_REG_INTC_DISABLE;
231 ct->chip.irq_unmask = irq_gc_unmask_enable_reg;
232 ct->chip.irq_mask = irq_gc_mask_disable_reg;
233 ct->chip.irq_mask_ack = irq_gc_mask_disable_reg;
234 ct->chip.irq_set_type = liointc_set_type;
235
236 gc->mask_cache = 0xffffffff;
237 priv->gc = gc;
238
239 for (i = 0; i < LIOINTC_NUM_PARENT; i++) {
240 if (parent_irq[i] <= 0)
241 continue;
242
243 priv->handler[i].priv = priv;
244 irq_set_chained_handler_and_data(parent_irq[i],
245 liointc_chained_handle_irq, &priv->handler[i]);
246 }
247
248 return 0;
249
250 out_free_domain:
251 irq_domain_remove(domain);
252 out_iounmap:
253 iounmap(base);
254 out_free_priv:
255 kfree(priv);
256
257 return err;
258 }
259
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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