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Message-ID: <20210105094855.30763-1-amelie.delaunay@foss.st.com>
Date: Tue, 5 Jan 2021 10:48:52 +0100
From: Amelie Delaunay <amelie.delaunay@...s.st.com>
To: Minas Harutyunyan <hminas@...opsys.com>,
Felipe Balbi <balbi@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>
CC: <linux-usb@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>,
Fabrice Gasnier <fabrice.gasnier@...s.st.com>,
Amelie Delaunay <amelie.delaunay@...s.st.com>
Subject: [PATCH v2 0/3] STM32MP15 OTG params updates
This patchset brings some updates on STM32MP15 OTG HS and FS.
It sets ahbcfg parameter for both HS and FS as the value reported by the
hardware is not recommended.
It also disables Link Power Management on OTG HS because with some Host
controllers (at least seen with some USB 3.2 Gen2 controllers), OTG doesn't
succeed to exit L1 state.
It also enables FS/LS PHY clock selection when the Core is in FS Host mode,
to have 6MHz PHY clock when the connected device is LS, and 48Mhz PHY clock
otherwise.
---
Changes in v2:
- Move author mail address from @st.com to @foss.st.com
- Add Minas' Reviewed-by on all patches
Amelie Delaunay (3):
usb: dwc2: set ahbcfg parameter for STM32MP15 OTG HS and FS
usb: dwc2: enable FS/LS PHY clock select on STM32MP15 FS OTG
usb: dwc2: disable Link Power Management on STM32MP15 HS OTG
drivers/usb/dwc2/params.c | 8 ++++++++
1 file changed, 8 insertions(+)
--
2.17.1
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