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Message-ID: <1609842147-8161-1-git-send-email-claudiu.beznea@microchip.com>
Date: Tue, 5 Jan 2021 12:22:24 +0200
From: Claudiu Beznea <claudiu.beznea@...rochip.com>
To: <rjw@...ysocki.net>, <viresh.kumar@...aro.org>,
<robh+dt@...nel.org>
CC: <linux-pm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
Claudiu Beznea <claudiu.beznea@...rochip.com>
Subject: [PATCH 0/3] cpufreq: sama7g5: add support for sama7g5
Hi,
SAMA7G5 supports run-time changes of CPU frequency. This is done by
changing CPU's PLL. The block diagram explaining the relation b/w
CPU clock and its PLL is as follows:
+--------------> cpuck
|
+------+ | +-----+
cpupllck --> | pres |--+--> | div |---> mck
+------+ +-----+
where cpuck is the CPU's clock and mck is the system master clock 0
that feeds some other IPs. All the IPs feed by mck are glich free
aware.
Because MCK is also feed by cpuplllk the CPUFreq driver needs also
to handle this clock to avoid its under/over clocking: every
time the CPUFreq's .target_index API is called:
- the mck frequency is adjusted to avoid its overclocking/underclocking
- then the cpuck frequency is increased/lowered
- then mck frequency is adjusted to keep the initial 200MHz frequency
Thank you,
Claudiu Beznea
Claudiu Beznea (3):
dt-bindings: cpufreq: sama7g5-cpufreq: add dt bindings documentation
cpufreq: sama7g5: add cpufreq driver
MAINTAINERS: add sama7g5 cpufreq
.../bindings/cpufreq/cpufreq-sama7g5.yaml | 80 +++++
MAINTAINERS | 6 +
drivers/cpufreq/Kconfig.arm | 9 +
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/cpufreq-dt-platdev.c | 2 +
drivers/cpufreq/sama7g5-cpufreq.c | 371 +++++++++++++++++++++
6 files changed, 469 insertions(+)
create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-sama7g5.yaml
create mode 100644 drivers/cpufreq/sama7g5-cpufreq.c
--
2.7.4
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