linux-kernel - Re: [PATCH 3/5] arm64: dts: renesas: r8a779a0: Add Ethernet-AVB support

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Message-ID: <CAMuHMdWqA8Kv_5Ob4ZycM9H-EaHNydMWCX+6HSECRRK3Z7oHkA@mail.gmail.com>
Date:   Tue, 5 Jan 2021 16:31:26 +0100
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Wolfram Sang <wsa+renesas@...g-engineering.com>
Cc:     Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        Tho Vu <tho.vu.wh@...esas.com>,
        Magnus Damm <magnus.damm@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 3/5] arm64: dts: renesas: r8a779a0: Add Ethernet-AVB support

Hi Wolfram,

On Sun, Dec 27, 2020 at 2:04 PM Wolfram Sang
<wsa+renesas@...g-engineering.com> wrote:
> From: Tho Vu <tho.vu.wh@...esas.com>
>
> Define the generic parts of Ethernet-AVB device nodes. Only AVB0 was
> tested because it was the only port with a PHY on current hardware.
>
> Signed-off-by: Tho Vu <tho.vu.wh@...esas.com>
> [wsa: double checked & rebased]
> Signed-off-by: Wolfram Sang <wsa+renesas@...g-engineering.com>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> @@ -377,6 +377,276 @@ i2c6: i2c@...e8000 {
>                         status = "disabled";
>                 };
>
> +               avb0: ethernet@...00000 {
> +                       compatible = "renesas,etheravb-r8a779a0",
> +                                    "renesas,etheravb-rcar-gen3";
> +                       reg = <0 0xe6800000 0 0x800>;
> +                       interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
> +                       interrupt-names = "ch0", "ch1", "ch2", "ch3",
> +                                         "ch4", "ch5", "ch6", "ch7",
> +                                         "ch8", "ch9", "ch10", "ch11",
> +                                         "ch12", "ch13", "ch14", "ch15",
> +                                         "ch16", "ch17", "ch18", "ch19",
> +                                         "ch20", "ch21", "ch22", "ch23",
> +                                         "ch24";
> +                       clocks = <&cpg CPG_MOD 211>;
> +                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> +                       resets = <&cpg 211>;
> +                       phy-mode = "rgmii";
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       status = "disabled";

$ make dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/net/renesas,etheravb.yaml
arch/arm64/boot/dts/renesas/r8a779a0-falcon.dt.yaml:
ethernet@...00000: 'rx-internal-delay-ps' is a required property

Similarly, "tx-internal-delay-ps" should be added to all instances, too.

The rest looks good to me, so with the above fixed:

Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds