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Message-ID: <CAGb2v64MmtmpYiLjV_3H_K3i9FVEqmj2jp02HD1FBVzqK1N=eg@mail.gmail.com>
Date: Wed, 6 Jan 2021 10:39:59 +0800
From: Chen-Yu Tsai <wens@...e.org>
To: Linus Walleij <linus.walleij@...aro.org>
Cc: Samuel Holland <samuel@...lland.org>,
Maxime Ripard <mripard@...nel.org>,
Jernej Skrabec <jernej.skrabec@...l.net>,
Rob Herring <robh+dt@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Andre Przywara <andre.przywara@....com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
linux-clk <linux-clk@...r.kernel.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
linux-sunxi <linux-sunxi@...glegroups.com>
Subject: Re: [PATCH v2 2/4] pinctrl: sunxi: h6-r: Add s_rsb pin functions
On Wed, Jan 6, 2021 at 6:35 AM Linus Walleij <linus.walleij@...aro.org> wrote:
>
> On Sun, Jan 3, 2021 at 11:00 AM Samuel Holland <samuel@...lland.org> wrote:
>
> > As there is an RSB controller in the H6 SoC, there should be some pin
> > configuration for it. While no such configuration is documented, the
> > "s_i2c" pins are suspiciously on the "alternate" function 3, with no
> > primary function 2 given. This suggests the primary function for these
> > pins is actually RSB, and that is indeed the case.
> >
> > Add the "s_rsb" pin functions so the RSB controller can be used.
> >
> > Signed-off-by: Samuel Holland <samuel@...lland.org>
>
> Is it OK if I just apply this patch to the pinctrl tree?
Please do.
Thanks
ChenYu
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