linux-kernel - Re: [PATCH v10 3/7] [v10, 3/7]: soc: mediatek: SVS: introduce MTK SVS engine

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <CANMq1KCDPn6vRXMC5piH=Ym+ZGTiF=B4KAJ-5iKSWwVQLWgYNA@mail.gmail.com>
Date:   Wed, 6 Jan 2021 16:44:19 +0800
From:   Nicolas Boichat <drinkcat@...omium.org>
To:     Roger Lu <roger.lu@...iatek.com>
Cc:     Mark Rutland <mark.rutland@....com>,
        Nicolas Boichat <drinkcat@...gle.com>,
        Nishanth Menon <nm@...com>, Kevin Hilman <khilman@...nel.org>,
        Enric Balletbo Serra <eballetbo@...il.com>,
        "open list:THERMAL" <linux-pm@...r.kernel.org>,
        Angus Lin <Angus.Lin@...iatek.com>,
        Xiaoqing Liu <Xiaoqing.Liu@...iatek.com>,
        lkml <linux-kernel@...r.kernel.org>,
        Stephen Boyd <sboyd@...nel.org>,
        Devicetree List <devicetree@...r.kernel.org>,
        Rob Herring <robh+dt@...nel.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-mediatek@...ts.infradead.org>,
        HenryC Chen <HenryC.Chen@...iatek.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Charles Yang <Charles.Yang@...iatek.com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        YT Lee <yt.lee@...iatek.com>, Fan Chen <fan.chen@...iatek.com>,
        linux-arm Mailing List <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v10 3/7] [v10, 3/7]: soc: mediatek: SVS: introduce MTK SVS engine

On Wed, Jan 6, 2021 at 4:41 PM Roger Lu <roger.lu@...iatek.com> wrote:
>
> Hi Nicolas,
>
> [snip]
> > >
> > > > +
> > > > +       /* Svs efuse parsing */
> > > > +       ft_pgm = (svsp->efuse[0] >> 4) & GENMASK(3, 0);
> > > > +
> > > > +       for (idx = 0; idx < svsp->bank_num; idx++) {
> > > > +               svsb = &svsp->banks[idx];
> > > > +
> > > > +               if (ft_pgm <= 1)
> > > > +                       svsb->init01_volt_flag = SVSB_INIT01_VOLT_IGNORE;
> > > > +
> > > > +               switch (svsb->sw_id) {
> > > > +               case SVSB_CPU_LITTLE:
> > > > +                       svsb->bdes = svsp->efuse[16] & GENMASK(7, 0);
> > > > +                       svsb->mdes = (svsp->efuse[16] >> 8) & GENMASK(7, 0);
> > > > +                       svsb->dcbdet = (svsp->efuse[16] >> 16) & GENMASK(7, 0);
> > > > +                       svsb->dcmdet = (svsp->efuse[16] >> 24) & GENMASK(7, 0);
> > > > +                       svsb->mtdes  = (svsp->efuse[17] >> 16) & GENMASK(7, 0);
> > >
> > > Again, if all of those values were u8, there'd be no need for these GENMASK
> >
> > Ok, I'll use u8 instead of GENMASK. Thanks.
>
> After refining the codes, I think it's much explicit to assign the bits
> I want by GENMASK() and will remove other GENMASK() that are repetitive
> like in svs_set_bank_phase() or svs_set_freqs_pct_v2().

I'm not sure what you mean, but, sure, you can go ahead with v11 and
we'll see how it looks.

Thanks,

> [snip]
>