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Date: Wed, 6 Jan 2021 15:56:08 +0530 From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org> To: Vinod Koul <vkoul@...nel.org> Cc: agross@...nel.org, bjorn.andersson@...aro.org, linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org Subject: Re: [PATCH v2 04/18] ARM: dts: qcom: sdx55: Add support for SDHCI controller On Tue, Jan 05, 2021 at 09:22:59PM +0530, Vinod Koul wrote: > On 05-01-21, 17:56, Manivannan Sadhasivam wrote: > > Add devicetree support for SDHCI controller found in Qualcomm SDX55 SoC. > > The SDHCI controller used in this SoC is based on the MSM SDHCI v5 IP. > > Hence, the support is added by reusing the existing sdhci driver with > > "qcom,sdhci-msm-v5" as the fallback. > > > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org> > > --- > > arch/arm/boot/dts/qcom-sdx55.dtsi | 12 ++++++++++++ > > 1 file changed, 12 insertions(+) > > > > diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi > > index eeb6bf392f93..3f8e98bfc020 100644 > > --- a/arch/arm/boot/dts/qcom-sdx55.dtsi > > +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi > > @@ -154,6 +154,18 @@ blsp1_uart3: serial@...000 { > > status = "disabled"; > > }; > > > > + sdhc_1: sdhci@...4000 { > > Any reason why this is sdhc_1 label, do we have another one..? > The documentation lists this as SDC1 eventhough there seems to be no other instances. Thanks, Mani
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