[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <9a78cd4f-838d-0410-62fa-16e4ab921681@arm.com>
Date: Wed, 6 Jan 2021 16:35:29 +0000
From: Vincenzo Frascino <vincenzo.frascino@....com>
To: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
kasan-dev@...glegroups.com
Cc: Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>,
Dmitry Vyukov <dvyukov@...gle.com>,
Andrey Ryabinin <aryabinin@...tuozzo.com>,
Alexander Potapenko <glider@...gle.com>,
Marco Elver <elver@...gle.com>,
Evgenii Stepanov <eugenis@...gle.com>,
Branislav Rankov <Branislav.Rankov@....com>,
Andrey Konovalov <andreyknvl@...gle.com>,
Will Deacon <will@...nel.org>
Subject: Re: [PATCH 0/4] arm64: ARMv8.5-A: MTE: Add async mode support
On 1/6/21 11:55 AM, Vincenzo Frascino wrote:
> This patchset implements the asynchronous mode support for ARMv8.5-A
> Memory Tagging Extension (MTE), which is a debugging feature that allows
> to detect with the help of the architecture the C and C++ programmatic
> memory errors like buffer overflow, use-after-free, use-after-return, etc.
>
> MTE is built on top of the AArch64 v8.0 virtual address tagging TBI
> (Top Byte Ignore) feature and allows a task to set a 4 bit tag on any
> subset of its address space that is multiple of a 16 bytes granule. MTE
> is based on a lock-key mechanism where the lock is the tag associated to
> the physical memory and the key is the tag associated to the virtual
> address.
> When MTE is enabled and tags are set for ranges of address space of a task,
> the PE will compare the tag related to the physical memory with the tag
> related to the virtual address (tag check operation). Access to the memory
> is granted only if the two tags match. In case of mismatch the PE will raise
> an exception.
>
> The exception can be handled synchronously or asynchronously. When the
> asynchronous mode is enabled:
> - Upon fault the PE updates the TFSR_EL1 register.
> - The kernel detects the change during one of the following:
> - Context switching
> - Return to user/EL0
> - Kernel entry from EL1
> - Kernel exit to EL1
> - If the register has been updated by the PE the kernel clears it and
> reports the error.
>
> The series contains as well an optimization to mte_assign_mem_tag_range().
>
> The series is based on linux 5.11-rc2.
>
> To simplify the testing a tree with the new patches on top has been made
> available at [1].
>
> [1] https://git.gitlab.arm.com/linux-arm/linux-vf.git mte/v10.async
>
> Cc: Catalin Marinas <catalin.marinas@....com>
> Cc: Will Deacon <will.deacon@....com>
Will is not in arm anymore :( Sorry Will... I will fix this in v2.
> Cc: Dmitry Vyukov <dvyukov@...gle.com>
> Cc: Andrey Ryabinin <aryabinin@...tuozzo.com>
> Cc: Alexander Potapenko <glider@...gle.com>
> Cc: Marco Elver <elver@...gle.com>
> Cc: Evgenii Stepanov <eugenis@...gle.com>
> Cc: Branislav Rankov <Branislav.Rankov@....com>
> Cc: Andrey Konovalov <andreyknvl@...gle.com>
> Signed-off-by: Vincenzo Frascino <vincenzo.frascino@....com>
>
> Vincenzo Frascino (4):
> kasan, arm64: Add KASAN light mode
> arm64: mte: Add asynchronous mode support
> arm64: mte: Enable async tag check fault
> arm64: mte: Optimize mte_assign_mem_tag_range()
>
> arch/arm64/include/asm/memory.h | 2 +-
> arch/arm64/include/asm/mte-kasan.h | 5 ++-
> arch/arm64/include/asm/mte.h | 27 +++++++++++-
> arch/arm64/kernel/entry-common.c | 6 +++
> arch/arm64/kernel/mte.c | 67 ++++++++++++++++++++++++++++--
> arch/arm64/lib/mte.S | 15 -------
> include/linux/kasan.h | 1 +
> include/linux/kasan_def.h | 39 +++++++++++++++++
> mm/kasan/hw_tags.c | 24 ++---------
> mm/kasan/kasan.h | 2 +-
> 10 files changed, 145 insertions(+), 43 deletions(-)
> create mode 100644 include/linux/kasan_def.h
>
--
Regards,
Vincenzo
Powered by blists - more mailing lists