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Message-ID: <1609989081-29353-10-git-send-email-yongqiang.niu@mediatek.com>
Date: Thu, 7 Jan 2021 11:11:19 +0800
From: Yongqiang Niu <yongqiang.niu@...iatek.com>
To: CK Hu <ck.hu@...iatek.com>, Philipp Zabel <p.zabel@...gutronix.de>,
Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>
CC: David Airlie <airlied@...ux.ie>, Daniel Vetter <daniel@...ll.ch>,
Mark Rutland <mark.rutland@....com>,
<dri-devel@...ts.freedesktop.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<Project_Global_Chrome_Upstream_Group@...iatek.com>,
Hsin-Yi Wang <hsinyi@...omium.org>,
Yongqiang Niu <yongqiang.niu@...iatek.com>
Subject: [PATCH v9, 09/11] drm/mediatek: enable dither function
for 5 or 6 bpc panel, we need enable dither function
to improve the display quality
Signed-off-by: Yongqiang Niu <yongqiang.niu@...iatek.com>
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 38 ++++++++++++++++++++++++++++-
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index 03589c9..81ed076 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -53,7 +53,9 @@
#define DITHER_EN BIT(0)
#define DISP_DITHER_CFG 0x0020
#define DITHER_RELAY_MODE BIT(0)
+#define DITHER_ENGINE_EN BIT(1)
#define DISP_DITHER_SIZE 0x0030
+#define DITHER_REG(idx) (0x100 + (idx) * 4)
#define LUT_10BIT_MASK 0x03ff
@@ -258,8 +260,42 @@ static void mtk_dither_config(struct mtk_ddp_comp *comp, unsigned int w,
unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
{
+ bool enable = true;
+
+ const u32 dither_setting[] = {
+ 0x00000000, /* 5 */
+ 0x00003002, /* 6 */
+ 0x00000000, /* 7 */
+ 0x00000000, /* 8 */
+ 0x00000000, /* 9 */
+ 0x00000000, /* 10 */
+ 0x00000000, /* 11 */
+ 0x00000011, /* 12 */
+ 0x00000000, /* 13 */
+ 0x00000000, /* 14 */
+ };
+
+ if (bpc == 6) {
+ mtk_ddp_write(cmdq_pkt, 0x40400001, comp, DITHER_REG(15));
+ mtk_ddp_write(cmdq_pkt, 0x40404040, comp, DITHER_REG(16));
+ } else if (bpc == 5) {
+ mtk_ddp_write(cmdq_pkt, 0x50500001, comp, DITHER_REG(15));
+ mtk_ddp_write(cmdq_pkt, 0x50504040, comp, DITHER_REG(16));
+ } else {
+ enable = false;
+ }
+
+ if (enable) {
+ u32 idx;
+
+ for (idx = 0; idx < ARRAY_SIZE(dither_setting); idx++)
+ mtk_ddp_write(cmdq_pkt, dither_setting[idx], comp,
+ DITHER_REG(idx + 5));
+ }
+
mtk_ddp_write(cmdq_pkt, h << 16 | w, comp, DISP_DITHER_SIZE);
- mtk_ddp_write(cmdq_pkt, DITHER_RELAY_MODE, comp, DISP_DITHER_CFG);
+ mtk_ddp_write(cmdq_pkt, enable ? DITHER_ENGINE_EN : DITHER_RELAY_MODE,
+ comp, DISP_DITHER_CFG);
}
static void mtk_dither_start(struct mtk_ddp_comp *comp)
--
1.8.1.1.dirty
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