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Message-ID: <20210108095419.quegerk52wwhrxye@gilmour>
Date: Fri, 8 Jan 2021 10:54:19 +0100
From: Maxime Ripard <maxime@...no.tech>
To: Paul Kocialkowski <paul.kocialkowski@...tlin.com>
Cc: linux-media@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-doc@...r.kernel.org, devel@...verdev.osuosl.org,
linux-sunxi@...glegroups.com, Yong Deng <yong.deng@...ewell.com>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Rob Herring <robh+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...l.net>,
Jonathan Corbet <corbet@....net>,
Kishon Vijay Abraham I <kishon@...com>,
Vinod Koul <vkoul@...nel.org>,
Helen Koike <helen.koike@...labora.com>,
Dafna Hirschfeld <dafna.hirschfeld@...labora.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Sakari Ailus <sakari.ailus@...ux.intel.com>,
Hans Verkuil <hans.verkuil@...co.com>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
kevin.lhopital@...mail.com
Subject: Re: [PATCH v4 09/15] media: sunxi: Add support for the A31 MIPI
CSI-2 controller
On Thu, Dec 31, 2020 at 03:29:42PM +0100, Paul Kocialkowski wrote:
> The A31 MIPI CSI-2 controller is a dedicated MIPI CSI-2 bridge
> found on Allwinner SoCs such as the A31 and V3/V3s.
>
> It is a standalone block, connected to the CSI controller on one side
> and to the MIPI D-PHY block on the other. It has a dedicated address
> space, interrupt line and clock.
>
> It is represented as a V4L2 subdev to the CSI controller and takes a
> MIPI CSI-2 sensor as its own subdev, all using the fwnode graph and
> media controller API.
>
> Only 8-bit and 10-bit Bayer formats are currently supported.
> While up to 4 internal channels to the CSI controller exist, only one
> is currently supported by this implementation.
>
> Signed-off-by: Paul Kocialkowski <paul.kocialkowski@...tlin.com>
CHECK: Alignment should match open parenthesis :)
Once fixed,
Acked-by: Maxime Ripard <mripard@...nel.org>
Maxime
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