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Message-Id: <20210109134617.146275-1-angelogioacchino.delregno@somainline.org>
Date: Sat, 9 Jan 2021 14:46:08 +0100
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...ainline.org>
To: linux-arm-msm@...r.kernel.org
Cc: konrad.dybcio@...ainline.org, marijn.suijten@...ainline.org,
martin.botka@...ainline.org, phone-devel@...r.kernel.org,
linux-kernel@...r.kernel.org, agross@...nel.org,
bjorn.andersson@...aro.org, mturquette@...libre.com,
sboyd@...nel.org, robh+dt@...nel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...ainline.org>
Subject: [PATCH 0/9] Clock fixes for MSM8998 GCC, MMCC, GPUCC
This patch series fixes some issues with the MSM8998 clocks and, in
particular, brings a very important fix to the GCC PLLs.
These fixes are enhancing this SoC's stability and also makes it
possible to eventually enable the Adreno GPU (with proper clock
scaling) and other components.
This patch series was tested on:
- Sony Xperia XZ Premium (MSM8998)
- F(x)Tec Pro1 (MSM8998)
AngeloGioacchino Del Regno (9):
clk: qcom: gcc-msm8998: Wire up gcc_mmss_gpll0 clock
clk: qcom: gcc-msm8998: Add missing hmss_gpll0_clk_src clock
clk: qcom: gcc-msm8998: Mark gpu_cfg_ahb_clk as critical
clk: qcom: gcc-msm8998: Fix Alpha PLL type for all GPLLs
clk: qcom: mmcc-msm8998: Set CLK_GET_RATE_NOCACHE to pixel/byte clks
clk: qcom: mmcc-msm8998: Add hardware clockgating registers to some
clks
clk: qcom: mmcc-msm8998: Set bimc_smmu_gdsc always on
clk: qcom: gpucc-msm8998: Add resets, cxc, fix flags on gpu_gx_gdsc
clk: qcom: gpucc-msm8998: Allow fabia gpupll0 rate setting
drivers/clk/qcom/gcc-msm8998.c | 143 ++++++++++++-------
drivers/clk/qcom/gpucc-msm8998.c | 18 ++-
drivers/clk/qcom/mmcc-msm8998.c | 20 ++-
include/dt-bindings/clock/qcom,gcc-msm8998.h | 2 +
4 files changed, 125 insertions(+), 58 deletions(-)
--
2.29.2
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