linux-kernel - [PATCH v2 15/15] dt-bindings: cpufreq: qcom-hw: Add bindings for 8998

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <20210109180359.236098-16-angelogioacchino.delregno@somainline.org>
Date:   Sat,  9 Jan 2021 19:03:59 +0100
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...ainline.org>
To:     linux-arm-msm@...r.kernel.org
Cc:     konrad.dybcio@...ainline.org, marijn.suijten@...ainline.org,
        martin.botka@...ainline.org, phone-devel@...r.kernel.org,
        linux-kernel@...r.kernel.org, robh+dt@...nel.org,
        rjw@...ysocki.net, viresh.kumar@...aro.org, nks@...wful.org,
        agross@...nel.org, bjorn.andersson@...aro.org,
        daniel.lezcano@...aro.org, manivannan.sadhasivam@...aro.org,
        devicetree@...r.kernel.org, linux-pm@...r.kernel.org,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...ainline.org>
Subject: [PATCH v2 15/15] dt-bindings: cpufreq: qcom-hw: Add bindings for 8998

The OSM programming addition has been done under the
qcom,cpufreq-hw-8998 compatible name: specify the requirement
of two additional register spaces for this functionality.
This implementation, with the same compatible, has been
tested on MSM8998 and SDM630.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...ainline.org>
---
 .../bindings/cpufreq/cpufreq-qcom-hw.yaml     | 44 ++++++++++++++++---
 1 file changed, 39 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
index bc81b6203e27..0bf539954558 100644
--- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
@@ -18,6 +18,10 @@ description: |
 properties:
   compatible:
     oneOf:
+      - description: Non-secure v1 of CPUFREQ HW
+        items:
+          - const: qcom,cpufreq-hw-8998
+
       - description: v1 of CPUFREQ HW
         items:
           - const: qcom,cpufreq-hw
@@ -30,19 +34,27 @@ properties:
 
   reg:
     minItems: 2
-    maxItems: 3
+    maxItems: 7
     items:
       - description: Frequency domain 0 register region
       - description: Frequency domain 1 register region
       - description: Frequency domain 2 register region
+      - description: PLL ACD domain 0 register region
+      - description: PLL ACD domain 1 register region
+      - description: Operating State Manager domain 0 register region
+      - description: Operating State Manager domain 1 register region
 
   reg-names:
     minItems: 2
-    maxItems: 3
+    maxItems: 7
     items:
-      - const: freq-domain0
-      - const: freq-domain1
-      - const: freq-domain2
+      - const: "freq-domain0"
+      - const: "freq-domain1"
+      - const: "freq-domain2"
+      - const: "osm-acd0"
+      - const: "osm-acd1"
+      - const: "osm-domain0"
+      - const: "osm-domain1"
 
   clocks:
     items:
@@ -57,6 +69,28 @@ properties:
   '#freq-domain-cells':
     const: 1
 
+allOf:
+ - if:
+     properties:
+       reg-names:
+         contains:
+           const: qcom,cpufreq-hw-8998
+   then:
+     properties:
+       reg:
+         minItems: 4
+         maxItems: 6
+       reg-names:
+         items:
+           minItems: 4
+   else:
+     properties:
+       reg:
+         maxItems: 3
+       reg-names:
+         items:
+           maxItems: 3
+
 required:
   - compatible
   - reg
-- 
2.29.2