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Message-ID: <CAD=FV=UPNnSmgJM33QjAb4VvTe4Xs-OHcQCkk5E+o3u+afjbjA@mail.gmail.com>
Date: Mon, 11 Jan 2021 08:47:01 -0800
From: Doug Anderson <dianders@...omium.org>
To: Vinod Koul <vkoul@...nel.org>
Cc: Bjorn Andersson <bjorn.andersson@...aro.org>,
Mark Brown <broonie@...nel.org>, Wolfram Sang <wsa@...nel.org>,
linux-arm-msm <linux-arm-msm@...r.kernel.org>,
Andy Gross <agross@...nel.org>,
Matthias Kaehlcke <mka@...omium.org>,
Sumit Semwal <sumit.semwal@...aro.org>,
Amit Pundir <amit.pundir@...aro.org>,
linux-spi <linux-spi@...r.kernel.org>, linux-i2c@...r.kernel.org,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 7/7] arm64: dts: qcom: sdm845: enable dma for spi
Hi,
On Mon, Jan 11, 2021 at 7:18 AM Vinod Koul <vkoul@...nel.org> wrote:
>
> @@ -2622,6 +2626,13 @@ pinmux {
> "gpio2", "gpio3";
> function = "qup0";
> };
> +
> + config {
Convention in Qualcomm device tree files seems to be that the node is
"pinconf", not "config".
> + pins = "gpio0", "gpio1",
> + "gpio2", "gpio3";
> + drive-strength = <6>;
> + bias-disable;
> + };
Pin config almost never belongs in the SoC dtsi file. This should be
in the board .dts file. What if pulls are needed on some pins? What
if you need a stronger or weaker drive strength?
-Doug
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