lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Mon, 11 Jan 2021 19:06:05 +0100
From:   Ulf Hansson <ulf.hansson@...aro.org>
To:     Jisheng Zhang <Jisheng.Zhang@...aptics.com>
Cc:     Adrian Hunter <adrian.hunter@...el.com>,
        "linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] mmc: sdhci-of-dwcmshc: fix rpmb access

On Tue, 29 Dec 2020 at 09:19, Jisheng Zhang <Jisheng.Zhang@...aptics.com> wrote:
>
> Commit a44f7cb93732 ("mmc: core: use mrq->sbc when sending CMD23 for
> RPMB") began to use ACMD23 for RPMB if the host supports ACMD23. In
> RPMB ACM23 case, we need to set bit 31 to CMD23 argument, otherwise
> RPMB write operation will return general fail.
>
> However, no matter V4 is enabled or not, the dwcmshc's ARGUMENT2
> register is 32-bit block count register which doesn't support stuff
> bits of CMD23 argument. So let's handle this specific ACMD23 case.
>
> From another side, this patch also prepare for future v4 enabling
> for dwcmshc, because from the 4.10 spec, the ARGUMENT2 register is
> redefined as 32bit block count which doesn't support stuff bits of
> CMD23 argument.
>
> Fixes: a44f7cb93732 ("mmc: core: use mrq->sbc when sending CMD23 for RPMB")
> Signed-off-by: Jisheng Zhang <Jisheng.Zhang@...aptics.com>

Applied for fixes and by adding a stable tag, thanks!

Kind regards
Uffe


> ---
>  drivers/mmc/host/sdhci-of-dwcmshc.c | 27 +++++++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
> index 4b673792b5a4..d90020ed3622 100644
> --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> @@ -16,6 +16,8 @@
>
>  #include "sdhci-pltfm.h"
>
> +#define SDHCI_DWCMSHC_ARG2_STUFF       GENMASK(31, 16)
> +
>  /* DWCMSHC specific Mode Select value */
>  #define DWCMSHC_CTRL_HS400             0x7
>
> @@ -49,6 +51,29 @@ static void dwcmshc_adma_write_desc(struct sdhci_host *host, void **desc,
>         sdhci_adma_write_desc(host, desc, addr, len, cmd);
>  }
>
> +static void dwcmshc_check_auto_cmd23(struct mmc_host *mmc,
> +                                    struct mmc_request *mrq)
> +{
> +       struct sdhci_host *host = mmc_priv(mmc);
> +
> +       /*
> +        * No matter V4 is enabled or not, ARGUMENT2 register is 32-bit
> +        * block count register which doesn't support stuff bits of
> +        * CMD23 argument on dwcmsch host controller.
> +        */
> +       if (mrq->sbc && (mrq->sbc->arg & SDHCI_DWCMSHC_ARG2_STUFF))
> +               host->flags &= ~SDHCI_AUTO_CMD23;
> +       else
> +               host->flags |= SDHCI_AUTO_CMD23;
> +}
> +
> +static void dwcmshc_request(struct mmc_host *mmc, struct mmc_request *mrq)
> +{
> +       dwcmshc_check_auto_cmd23(mmc, mrq);
> +
> +       sdhci_request(mmc, mrq);
> +}
> +
>  static void dwcmshc_set_uhs_signaling(struct sdhci_host *host,
>                                       unsigned int timing)
>  {
> @@ -133,6 +158,8 @@ static int dwcmshc_probe(struct platform_device *pdev)
>
>         sdhci_get_of_property(pdev);
>
> +       host->mmc_host_ops.request = dwcmshc_request;
> +
>         err = sdhci_add_host(host);
>         if (err)
>                 goto err_clk;
> --
> 2.30.0.rc2
>

Powered by blists - more mailing lists