linux-kernel - Re: [PATCH v3 01/10] dt-bindings: irq: sun6i-r: Split the binding from sun7i-nmi

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Message-ID: <20210111222934.GA3170411@robh.at.kernel.org>
Date:   Mon, 11 Jan 2021 16:29:34 -0600
From:   Rob Herring <robh@...nel.org>
To:     Samuel Holland <samuel@...lland.org>
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        Maxime Ripard <mripard@...nel.org>,
        Chen-Yu Tsai <wens@...e.org>,
        Jernej Skrabec <jernej.skrabec@...l.net>,
        Russell King <linux@...linux.org.uk>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>,
        Ondrej Jirman <megous@...ous.com>, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-sunxi@...glegroups.com
Subject: Re: [PATCH v3 01/10] dt-bindings: irq: sun6i-r: Split the binding
 from sun7i-nmi

On Sun, Jan 03, 2021 at 04:30:52AM -0600, Samuel Holland wrote:
> The R_INTC in the A31 and newer sun8i/sun50i SoCs has additional
> functionality compared to the sun7i/sun9i NMI controller. Among other
> things, it multiplexes up to 128 interrupts corresponding to (and in
> parallel to) the first 128 GIC SPIs. This means the NMI is no longer the
> lowest-numbered interrupt, since it is SPI 32 or 96 (depending on SoC).
> 
> To allow access to all multiplexed IRQs, the R_INTC requires a new
> binding where the interrupt number matches the GIC interrupt number.
> For simplicity, copy the three-cell GIC binding; this disambiguates
> interrupt 0 in the old binding (the NMI) from interrupt 0 in the new
> binding (SPI 0) by the number of cells.
> 
> Signed-off-by: Samuel Holland <samuel@...lland.org>
> ---
>  .../allwinner,sun6i-a31-r-intc.yaml           | 64 +++++++++++++++++++
>  .../allwinner,sun7i-a20-sc-nmi.yaml           | 10 ---
>  2 files changed, 64 insertions(+), 10 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml
> new file mode 100644
> index 000000000000..18805b6555c2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml
> @@ -0,0 +1,64 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Allwinner A31 NMI/Wakeup Interrupt Controller Device Tree Bindings
> +
> +maintainers:
> +  - Chen-Yu Tsai <wens@...e.org>
> +  - Maxime Ripard <mripard@...nel.org>
> +
> +allOf:
> +  - $ref: /schemas/interrupt-controller.yaml#
> +
> +properties:
> +  "#interrupt-cells":
> +    const: 3
> +    description:
> +      The first cell is GIC_SPI (0), the second cell is the IRQ number, and
> +      the third cell is the trigger type as defined in interrupt.txt in this
> +      directory.
> +
> +  compatible:
> +    oneOf:
> +      - items:
> +          - enum:
> +              - allwinner,sun8i-a83t-r-intc
> +              - allwinner,sun50i-a64-r-intc
> +              - allwinner,sun50i-h6-r-intc
> +          - const: allwinner,sun6i-a31-r-intc
> +      - const: allwinner,sun6i-a31-r-intc
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  interrupt-controller: true
> +
> +required:
> +  - "#interrupt-cells"
> +  - compatible
> +  - reg
> +  - interrupts
> +  - interrupt-controller
> +
> +unevaluatedProperties: false

additionalProperties: false

(a bit stricter and actually implemented ATM)

> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +    r_intc: interrupt-controller@...0c00 {
> +            compatible = "allwinner,sun50i-a64-r-intc",
> +                         "allwinner,sun6i-a31-r-intc";
> +            interrupt-controller;
> +            #interrupt-cells = <3>;
> +            reg = <0x01f00c00 0x400>;
> +            interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
> +    };
> +
> +...
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml
> index 8acca0ae3129..f34ecc8c7093 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml
> @@ -22,23 +22,13 @@ properties:
>  
>    compatible:
>      oneOf:
> -      - const: allwinner,sun6i-a31-r-intc
>        - const: allwinner,sun6i-a31-sc-nmi
>          deprecated: true
>        - const: allwinner,sun7i-a20-sc-nmi
> -      - items:
> -          - const: allwinner,sun8i-a83t-r-intc
> -          - const: allwinner,sun6i-a31-r-intc
>        - const: allwinner,sun9i-a80-nmi
> -      - items:
> -          - const: allwinner,sun50i-a64-r-intc
> -          - const: allwinner,sun6i-a31-r-intc
>        - items:
>            - const: allwinner,sun50i-a100-nmi
>            - const: allwinner,sun9i-a80-nmi
> -      - items:
> -          - const: allwinner,sun50i-h6-r-intc
> -          - const: allwinner,sun6i-a31-r-intc
>  
>    reg:
>      maxItems: 1
> -- 
> 2.26.2
>