lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 12 Jan 2021 15:46:55 +0100
From:   Neil Armstrong <narmstrong@...libre.com>
To:     Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
        linux-remoteproc@...r.kernel.org, linux-amlogic@...ts.infradead.org
Cc:     ohad@...ery.com, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, bjorn.andersson@...aro.org,
        robh+dt@...nel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2 5/5] ARM: dts: meson: add the AO ARC remote processor

On 02/01/2021 21:59, Martin Blumenstingl wrote:
> The 32-bit Amlogic Meson SoCs embed an ARC processor in the Always-On
> power domain which is typically used for managing system suspend. The
> memory for this ARC core is taken from the AHB SRAM area. Depending on
> the actual SoC a different ARC core is used:
> - Meson6 and earlier: some ARCv1 ISA based core (probably an ARC625)
> - Meson8 and later: an ARC EM4 (ARCv2 ISA) based core
> 
> Add the device-tree node for this remote-processor along with the
> required SRAM sections, clocks and reset-lines. Also use the
> SoC-specific compatible string to manage any differences (should
> they exist).
> 
> On Meson8, Meson8b and Meson8m2 the "secbus2" IO region is needed as
> some bits need to be programmed there. Add this IO region for those
> SoCs as well.
> 
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
> ---
>  arch/arm/boot/dts/meson.dtsi   |  7 +++++++
>  arch/arm/boot/dts/meson8.dtsi  | 21 +++++++++++++++++++++
>  arch/arm/boot/dts/meson8b.dtsi | 21 +++++++++++++++++++++
>  3 files changed, 49 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi
> index e0ca5f08d07d..8bae6ed0abb2 100644
> --- a/arch/arm/boot/dts/meson.dtsi
> +++ b/arch/arm/boot/dts/meson.dtsi
> @@ -200,6 +200,13 @@ aobus: aobus@...00000 {
>  			#size-cells = <1>;
>  			ranges = <0x0 0xc8100000 0x100000>;
>  
> +			ao_arc_rproc: remoteproc@1c {
> +				compatible= "amlogic,meson-mx-ao-arc";
> +				reg = <0x1c 0x8>, <0x38 0x8>;
> +				reg-names = "remap", "cpu";
> +				status = "disabled";
> +			};
> +
>  			ir_receiver: ir-receiver@480 {
>  				compatible= "amlogic,meson6-ir";
>  				reg = <0x480 0x20>;
> diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
> index 420324ea2ad7..157a950a55d3 100644
> --- a/arch/arm/boot/dts/meson8.dtsi
> +++ b/arch/arm/boot/dts/meson8.dtsi
> @@ -369,6 +369,14 @@ mux {
>  	};
>  };
>  
> +&ao_arc_rproc {
> +	compatible= "amlogic,meson8-ao-arc", "amlogic,meson-mx-ao-arc";
> +	amlogic,secbus2 = <&secbus2>;
> +	sram = <&ao_arc_sram>;
> +	resets = <&reset RESET_MEDIA_CPU>;
> +	clocks = <&clkc CLKID_AO_MEDIA_CPU>;
> +};
> +
>  &cbus {
>  	reset: reset-controller@...4 {
>  		compatible = "amlogic,meson8b-reset";
> @@ -496,6 +504,12 @@ mux {
>  };
>  
>  &ahb_sram {
> +	ao_arc_sram: ao-arc-sram@0 {
> +		compatible = "amlogic,meson8-ao-arc-sram";
> +		reg = <0x0 0x8000>;
> +		pool;
> +	};
> +
>  	smp-sram@...80 {
>  		compatible = "amlogic,meson8-smp-sram";
>  		reg = <0x1ff80 0x8>;
> @@ -631,6 +645,13 @@ &sdhc {
>  	clock-names = "clkin0", "clkin1", "clkin2", "clkin3", "pclk";
>  };
>  
> +&secbus {
> +	secbus2: system-controller@...0 {
> +		compatible = "amlogic,meson8-secbus2", "syscon";
> +		reg = <0x4000 0x2000>;
> +	};
> +};
> +
>  &sdio {
>  	compatible = "amlogic,meson8-sdio", "amlogic,meson-mx-sdio";
>  	clocks = <&clkc CLKID_SDIO>, <&clkc CLKID_CLK81>;
> diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
> index dbf7963b6c87..c02b03cbcdf4 100644
> --- a/arch/arm/boot/dts/meson8b.dtsi
> +++ b/arch/arm/boot/dts/meson8b.dtsi
> @@ -320,6 +320,14 @@ mux {
>  	};
>  };
>  
> +&ao_arc_rproc {
> +	compatible= "amlogic,meson8b-ao-arc", "amlogic,meson-mx-ao-arc";
> +	amlogic,secbus2 = <&secbus2>;
> +	sram = <&ao_arc_sram>;
> +	resets = <&reset RESET_MEDIA_CPU>;
> +	clocks = <&clkc CLKID_AO_MEDIA_CPU>;
> +};
> +
>  &cbus {
>  	reset: reset-controller@...4 {
>  		compatible = "amlogic,meson8b-reset";
> @@ -464,6 +472,12 @@ mux {
>  };
>  
>  &ahb_sram {
> +	ao_arc_sram: ao-arc-sram@0 {
> +		compatible = "amlogic,meson8b-ao-arc-sram";
> +		reg = <0x0 0x8000>;
> +		pool;
> +	};
> +
>  	smp-sram@...80 {
>  		compatible = "amlogic,meson8b-smp-sram";
>  		reg = <0x1ff80 0x8>;
> @@ -628,6 +642,13 @@ &sdhc {
>  	clock-names = "clkin0", "clkin1", "clkin2", "clkin3", "pclk";
>  };
>  
> +&secbus {
> +	secbus2: system-controller@...0 {
> +		compatible = "amlogic,meson8b-secbus2", "syscon";
> +		reg = <0x4000 0x2000>;
> +	};
> +};
> +
>  &sdio {
>  	compatible = "amlogic,meson8b-sdio", "amlogic,meson-mx-sdio";
>  	clocks = <&clkc CLKID_SDIO>, <&clkc CLKID_CLK81>;
> 

Reviewed-by: Neil Armstrong <narmstrong@...libre.com>

Powered by blists - more mailing lists