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Message-Id: <20210112040205.4117303-1-victording@google.com>
Date: Tue, 12 Jan 2021 04:02:03 +0000
From: Victor Ding <victording@...gle.com>
To: Ulf Hansson <ulf.hansson@...aro.org>,
Adrian Hunter <adrian.hunter@...el.com>
Cc: Ben Chuang <ben.chuang@...esyslogic.com.tw>,
Bjorn Helgaas <helgaas@...nel.org>,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
linux-mmc@...r.kernel.org, Victor Ding <victording@...gle.com>,
Alex Levin <levinale@...gle.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Kai-Heng Feng <kai.heng.feng@...onical.com>,
"Saheed O. Bolarinwa" <refactormyself@...il.com>,
Sean Paul <seanpaul@...omium.org>,
Sukumar Ghorai <sukumar.ghorai@...el.com>,
Yicong Yang <yangyicong@...ilicon.com>
Subject: [PATCH 0/2] Disable ASPM on GL9750 during a suspension
GL9750 SD Host Controller has a 3100us PortTPowerOnTime; however, it
enters L1.2 after only ~4us inactivity per PCIe trace. During a
suspend/resume process, PCI access operations are frequently longer than
4us apart. Therefore, the device frequently enters and leaves L1.2 during
this process, causing longer than desirable suspend/resume time. The total
time cost due to this L1.2 exit latency could add up to ~200ms.
Considering that PCI access operations are fairly close to each other
(though sometimes > 4us), the actual time the device could stay in L1.2 is
negligible. Therefore, the little power-saving benefit from ASPM during
suspend/resume does not overweight the performance degradation caused by
long L1.2 exit latency.
Therefore, I am proposing to disable ASPM during a suspend/resume process.
Victor Ding (2):
PCI/ASPM: Disable ASPM until its LTR and L1ss state is restored
mmc: sdhci-pci-gli: Disable ASPM during a suspension
drivers/mmc/host/sdhci-pci-core.c | 2 +-
drivers/mmc/host/sdhci-pci-gli.c | 46 +++++++++++++++++++++++++++++--
drivers/mmc/host/sdhci-pci.h | 1 +
drivers/pci/pci.c | 11 ++++++++
drivers/pci/pci.h | 2 ++
drivers/pci/pcie/aspm.c | 2 +-
6 files changed, 60 insertions(+), 4 deletions(-)
--
2.30.0.284.gd98b1dd5eaa7-goog
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