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Date: Mon, 11 Jan 2021 23:08:43 -0800 From: Randy Dunlap <rdunlap@...radead.org> To: Ben Widawsky <ben.widawsky@...el.com>, linux-cxl@...r.kernel.org Cc: Dan Williams <dan.j.williams@...el.com>, linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org, linux-acpi@...r.kernel.org, Ira Weiny <ira.weiny@...el.com>, Vishal Verma <vishal.l.verma@...el.com>, "Kelley, Sean V" <sean.v.kelley@...el.com>, Rafael Wysocki <rafael.j.wysocki@...el.com>, Bjorn Helgaas <helgaas@...nel.org>, Jonathan Cameron <Jonathan.Cameron@...wei.com>, Jon Masters <jcm@...masters.org>, Chris Browy <cbrowy@...ry-design.com>, Christoph Hellwig <hch@...radead.org>, daniel.lll@...baba-inc.com Subject: Re: [RFC PATCH v3 04/16] cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpoints On 1/11/21 2:51 PM, Ben Widawsky wrote: > diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig > index 68da926ba5b1..0ac5080cd6e0 100644 > --- a/drivers/cxl/Kconfig > +++ b/drivers/cxl/Kconfig > @@ -33,4 +33,26 @@ config CXL_ACPI > specification. > > If unsure say 'm' > + > +config CXL_MEM > + tristate "CXL.mem: Endpoint Support" > + depends on PCI && CXL_BUS_PROVIDER > + default CXL_BUS_PROVIDER > + help > + The CXL.mem protocol allows a device to act as a provider of > + "System RAM" and/or "Persistent Memory" that is fully coherent > + as if the memory was attached to the typical CPU memory > + controller. All of those indented lines should use one tab (tristate, depends, default, and help). The help text should be indented with one tab + 2 spaces, like the lines below are. > + > + Say 'y/m' to enable a driver (named "cxl_mem.ko" when built as > + a module) that will attach to CXL.mem devices for > + configuration, provisioning, and health monitoring. This > + driver is required for dynamic provisioning of CXL.mem > + attached memory which is a pre-requisite for persistent memory patch 2 spells this as: prerequisite which is preferred IMO. > + support. Typically volatile memory is mapped by platform > + firmware and included in the platform memory map, but in some > + cases the OS is responsible for mapping that memory. See > + Chapter 2.3 Type 3 CXL Device in the CXL 2.0 specification. > + > + If unsure say 'm'. That last line needs one tab + 2 spaces for indentation. > endif -- ~Randy
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