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Message-Id: <20210111225121.820014-2-ben.widawsky@intel.com>
Date: Mon, 11 Jan 2021 14:51:05 -0800
From: Ben Widawsky <ben.widawsky@...el.com>
To: linux-cxl@...r.kernel.org
Cc: Ben Widawsky <ben.widawsky@...el.com>,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
"linux-acpi@...r.kernel.org, Ira Weiny" <ira.weiny@...el.com>,
Dan Williams <dan.j.williams@...el.com>,
Vishal Verma <vishal.l.verma@...el.com>,
"Kelley, Sean V" <sean.v.kelley@...el.com>,
Rafael Wysocki <rafael.j.wysocki@...el.com>,
Bjorn Helgaas <helgaas@...nel.org>,
Jonathan Cameron <Jonathan.Cameron@...wei.com>,
Jon Masters <jcm@...masters.org>,
Chris Browy <cbrowy@...ry-design.com>,
Randy Dunlap <rdunlap@...radead.org>,
Christoph Hellwig <hch@...radead.org>,
daniel.lll@...baba-inc.com
Subject: [RFC PATCH v3 01/16] docs: cxl: Add basic documentation
This starts a new cxl directory because CXL is a new bus and it is
expected that the documentation will grow large over time. Currently
only memory devices are documented as they are all that's supported.
Signed-off-by: Ben Widawsky <ben.widawsky@...el.com>
---
Documentation/cxl/index.rst | 12 ++++++++++++
Documentation/cxl/memory-devices.rst | 15 +++++++++++++++
Documentation/index.rst | 1 +
3 files changed, 28 insertions(+)
create mode 100644 Documentation/cxl/index.rst
create mode 100644 Documentation/cxl/memory-devices.rst
diff --git a/Documentation/cxl/index.rst b/Documentation/cxl/index.rst
new file mode 100644
index 000000000000..036e49553542
--- /dev/null
+++ b/Documentation/cxl/index.rst
@@ -0,0 +1,12 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+====================
+Compute Express Link
+====================
+
+.. toctree::
+ :maxdepth: 1
+
+ memory-devices
+
+.. only:: subproject and html
diff --git a/Documentation/cxl/memory-devices.rst b/Documentation/cxl/memory-devices.rst
new file mode 100644
index 000000000000..aa4262280c67
--- /dev/null
+++ b/Documentation/cxl/memory-devices.rst
@@ -0,0 +1,15 @@
+.. SPDX-License-Identifier: GPL-2.0
+.. include:: <isonum.txt>
+
+===================================
+Compute Express Link Memory Devices
+===================================
+
+A Compute Express Link Memory Device is a CXL component that implements the
+CXL.mem protocol. It contains some amount of volatile memory, persistent memory,
+or both.
+
+Driver Infrastructure
+=====================
+
+This sections covers the driver infrastructure for a CXL memory device.
diff --git a/Documentation/index.rst b/Documentation/index.rst
index 5888e8a7272f..7e5ab77264e9 100644
--- a/Documentation/index.rst
+++ b/Documentation/index.rst
@@ -137,6 +137,7 @@ needed).
misc-devices/index
scheduler/index
mhi/index
+ cxl/index
Architecture-agnostic documentation
-----------------------------------
--
2.30.0
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