linux-kernel - Re: [PATCH v4 3/6] ASoC: audio-graph-card: Support setting component plls and sysclks

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <762d798c-bd75-e24a-40fd-263f68f1a5f1@opensource.cirrus.com>
Date:   Tue, 12 Jan 2021 10:22:46 +0000
From:   Richard Fitzgerald <rf@...nsource.cirrus.com>
To:     Kuninori Morimoto <kuninori.morimoto.gx@...esas.com>
CC:     <broonie@...nel.org>, <robh+dt@...nel.org>,
        <nsaenzjulienne@...e.de>, <f.fainelli@...il.com>,
        <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <alsa-devel@...a-project.org>, <patches@...nsource.cirrus.com>,
        <bcm-kernel-feedback-list@...adcom.com>,
        <linux-rpi-kernel@...ts.infradead.org>,
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v4 3/6] ASoC: audio-graph-card: Support setting component
 plls and sysclks

On 12/01/2021 01:35, Kuninori Morimoto wrote:
> 
> Hi Richard
> 
>> Some codecs need plls and/or sysclks to be configured using the
>> snd_soc_component_set_[sysclk|pll] functions. These drivers cannot
>> necessarily be converted to use the clock framework. If the codec is on
>> a I2C/SPI bus, a nested clk_get would be needed to enable the bus clock.
>> But the clock framework does not support nested operations and this would
>> deadlock.
>>
>> This patch adds new dt properties that list phandles of components with
>> the pll/sysclk settings to be applied. Multiple settings can be given for
>> the same phandle to allow for components with multiple clocks and plls.
>> The plls and sysclks are enabled when the card bias level moves to STANDBY
>> and disabled when it moves to OFF.
>>
>> The implementation does not attempt to handle specifying complex clock
>> ordering interdependencies between components. The plls and sysclks are
>> applied to a component as it is passed to the card set_bias_level/
>> set_bias_level_post callbacks. It follows from this that the order
>> components are configured is the order that they are passed to those
>> callbacks.
>>
>> Signed-off-by: Richard Fitzgerald <rf@...nsource.cirrus.com>
>> ---
> 
> As I mentioned in v3, adding *general* pll to common card driver is
> maybe difficult.

You did say that. But you did not say why.
Can you be more specific about what problem you see with adding it
to the generic driver?

> Using your own customized audio-graph-card driver is better idea,
> instead of adding code to common driver.

I just don't want to duplicate code without good reason.

> 
> I think Sameer's Tegra driver (= [3/6]) is good sample for you ?
> 
> 	https://lore.kernel.org/r/1606413823-19885-1-git-send-email-spujar@nvidia.com
> 
> Thank you for your help !!
> 
> Best regards
> ---
> Kuninori Morimoto
>