lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Wed, 13 Jan 2021 00:15:48 +0100 From: Andreas Kemnade <andreas@...nade.info> To: robh+dt@...nel.org, shawnguo@...nel.org, s.hauer@...gutronix.de, kernel@...gutronix.de, festevam@...il.com, linux-imx@....com, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, j.neuschaefer@....net, letux-kernel@...nphoenux.org Cc: Andreas Kemnade <andreas@...nade.info> Subject: [PATCH 3/4] ARM: dts: imx6sl-tolino-shine3: correct console uart pinmux Configuration was correct enough to work with the pre-configuration done by uboot. While at it, also document the location. Signed-off-by: Andreas Kemnade <andreas@...nade.info> --- arch/arm/boot/dts/imx6sl-tolino-shine3.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6sl-tolino-shine3.dts b/arch/arm/boot/dts/imx6sl-tolino-shine3.dts index 27143ea0f0f1..62d2ebda04ff 100644 --- a/arch/arm/boot/dts/imx6sl-tolino-shine3.dts +++ b/arch/arm/boot/dts/imx6sl-tolino-shine3.dts @@ -156,7 +156,7 @@ pinctrl_uart1: uart1grp { fsl,pins = < MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1 - MX6SL_PAD_UART1_RXD__UART1_TX_DATA 0x1b0b1 + MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1 >; }; -- 2.20.1
Powered by blists - more mailing lists