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Date:   Wed, 13 Jan 2021 15:20:56 +0100
From:   Paolo Bonzini <pbonzini@...hat.com>
To:     Sean Christopherson <seanjc@...gle.com>
Cc:     Jim Mattson <jmattson@...gle.com>,
        syzbot <syzbot+e87846c48bf72bc85311@...kaller.appspotmail.com>,
        Borislav Petkov <bp@...en8.de>,
        "H . Peter Anvin" <hpa@...or.com>, Joerg Roedel <joro@...tes.org>,
        kvm list <kvm@...r.kernel.org>,
        LKML <linux-kernel@...r.kernel.org>,
        Ingo Molnar <mingo@...hat.com>,
        syzkaller-bugs <syzkaller-bugs@...glegroups.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        the arch/x86 maintainers <x86@...nel.org>
Subject: Re: UBSAN: shift-out-of-bounds in kvm_vcpu_after_set_cpuid

On 12/01/21 17:53, Sean Christopherson wrote:
> On Tue, Jan 12, 2021, Paolo Bonzini wrote:
>> On 12/01/21 00:01, Sean Christopherson wrote:
>>>> Perhaps cpuid_query_maxphyaddr() should just look at the low 5 bits of
>>>> CPUID.80000008H:EAX?
>>
>> The low 6 bits I guess---yes, that would make sense and it would have also
>> fixed the bug.
> 
> No, that wouldn't have fixed this specific bug.  In this case, the issue was
> CPUID.80000008H:AL == 0; masking off bits 7:6 wouldn't have changed anything.

Right.

> And, masking bits 7:6 is architecturally wrong.  Both the SDM and APM state that
> bits 7:0 contain the number of PA bits.

They cannot be higher than 52, therefore bits 7:6 are (architecturally) 
always zero.  In other words, I interpret "bit 7:0 contain the number of 
PA bits" as "you need not do an '& 63' yourself", which is basically the 
opposite of "bit 7:6 might be nonzero".  If masking made any difference, 
it would be outside the spec already.

In fact another possibility to avoid UB is to do "& 63" of both s and e 
in rsvd_bits.  This would also be masking bits 7:6 of the CPUID leaf, 
just done differently.

Paolo

> KVM could reject guest.MAXPA > host.MAXPA, but arbitrarily dropping bits would
> be wrong.
> 

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