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Date:   Thu, 14 Jan 2021 15:12:03 -0700
From:   Jeffrey Hugo <jeffrey.l.hugo@...il.com>
To:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...ainline.org>
Cc:     MSM <linux-arm-msm@...r.kernel.org>, konrad.dybcio@...ainline.org,
        marijn.suijten@...ainline.org, martin.botka@...ainline.org,
        phone-devel@...r.kernel.org, lkml <linux-kernel@...r.kernel.org>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Rob Herring <robh+dt@...nel.org>, linux-clk@...r.kernel.org,
        DTML <devicetree@...r.kernel.org>
Subject: Re: [PATCH 1/9] clk: qcom: gcc-msm8998: Wire up gcc_mmss_gpll0 clock

On Sat, Jan 9, 2021 at 6:47 AM AngeloGioacchino Del Regno
<angelogioacchino.delregno@...ainline.org> wrote:
>
> This clock enables the GPLL0 output to the multimedia subsystem
> clock controller.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...ainline.org>

Any reason why you are not also adding the div_clk?

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