[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <YAGxFbvrHHcOCZIW@ulmo>
Date: Fri, 15 Jan 2021 16:13:25 +0100
From: Thierry Reding <thierry.reding@...il.com>
To: Dmitry Osipenko <digetx@...il.com>
Cc: Jonathan Hunter <jonathanh@...dia.com>,
Peter De Schrijver <pdeschrijver@...dia.com>,
Prashant Gaikwad <pgaikwad@...dia.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, linux-tegra@...r.kernel.org,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 3/5] clk: tegra: Ensure that PLLU configuration is
applied properly
On Tue, Jan 12, 2021 at 03:27:22PM +0300, Dmitry Osipenko wrote:
> The PLLU (USB) consists of the PLL configuration itself and configuration
> of the PLLU outputs. The PLLU programming is inconsistent on T30 vs T114,
> where T114 immediately bails out if PLLU is enabled and T30 re-enables
> a potentially already enabled PLL (left after bootloader) and then fully
> reprograms it, which could be unsafe to do. The correct way should be to
> skip enabling of the PLL if it's already enabled and then apply
> configuration to the outputs. This patch doesn't fix any known problems,
> it's a minor improvement.
>
> Signed-off-by: Dmitry Osipenko <digetx@...il.com>
> ---
> drivers/clk/tegra/clk-pll.c | 9 ++++-----
> 1 file changed, 4 insertions(+), 5 deletions(-)
Acked-by: Thierry Reding <treding@...dia.com>
Download attachment "signature.asc" of type "application/pgp-signature" (834 bytes)
Powered by blists - more mailing lists