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Date:   Fri, 15 Jan 2021 16:57:36 +0100
From:   Thierry Reding <thierry.reding@...il.com>
To:     Sowjanya Komatineni <skomatineni@...dia.com>
Cc:     jonathanh@...dia.com, digetx@...il.com, wsa@...-dreams.de,
        linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-i2c@...r.kernel.org
Subject: Re: [PATCH v3] i2c: tegra: Create i2c_writesl_vi() to use with VI
 I2C for filling TX FIFO

On Tue, Jan 12, 2021 at 11:02:41AM -0800, Sowjanya Komatineni wrote:
> VI I2C controller has known hardware bug where immediate multiple
> writes to TX_FIFO register gets stuck.
> 
> Recommended software work around is to read I2C register after
> each write to TX_FIFO register to flush out the data.
> 
> This patch implements this work around for VI I2C controller.
> 
> Signed-off-by: Sowjanya Komatineni <skomatineni@...dia.com>
> ---
>  drivers/i2c/busses/i2c-tegra.c | 22 +++++++++++++++++++++-
>  1 file changed, 21 insertions(+), 1 deletion(-)

Acked-by: Thierry Reding <treding@...dia.com>

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