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Message-ID: <83d87dec-dd76-1ddc-1e20-4bf1c7db7918@intel.com>
Date: Fri, 15 Jan 2021 16:20:44 -0800
From: Dave Hansen <dave.hansen@...el.com>
To: "Dey, Megha" <megha.dey@...el.com>,
Ard Biesheuvel <ardb@...nel.org>
Cc: Herbert Xu <herbert@...dor.apana.org.au>,
"David S. Miller" <davem@...emloft.net>,
Linux Crypto Mailing List <linux-crypto@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
ravi.v.shankar@...el.com, tim.c.chen@...el.com,
andi.kleen@...el.com, wajdi.k.feghali@...el.com,
greg.b.tucker@...el.com, robert.a.kasten@...el.com,
rajendrakumar.chinnaiyan@...el.com, tomasz.kantecki@...el.com,
ryan.d.saffores@...el.com, ilya.albrekht@...el.com,
kyung.min.park@...el.com, Tony Luck <tony.luck@...el.com>,
ira.weiny@...el.com
Subject: Re: [RFC V1 3/7] crypto: ghash - Optimized GHASH computations
On 1/15/21 4:14 PM, Dey, Megha wrote:
> Also, I do not know of any cores that implement PCLMULQDQ and not AES-NI.
That's true, bit it's also possible that a hypervisor could enumerate
support for PCLMULQDQ and not AES-NI. In general, we've tried to
implement x86 CPU features independently, even if they never show up in
a real CPU independently.
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