linux-kernel - [PATCH 2/2] fpga: zynqmp: Adds secure BitStream loading support for Xilinx

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Date:   Mon, 18 Jan 2021 08:20:58 +0530
From:   Nava kishore Manne <nava.manne@...inx.com>
To:     <mdf@...nel.org>, <trix@...hat.com>, <robh+dt@...nel.org>,
        <michal.simek@...inx.com>, <linux-fpga@...r.kernel.org>,
        <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>
CC:     <git@...inx.com>, <chinnikishore369@...il.com>,
        Nava kishore Manne <nava.manne@...inx.com>
Subject: [PATCH 2/2] fpga: zynqmp: Adds secure BitStream loading support for Xilinx

This commit adds secure BitStream Loading support for the Xilinx
ZynqMp chip.

Signed-off-by: Nava kishore Manne <nava.manne@...inx.com>
---
 drivers/fpga/zynqmp-fpga.c           | 8 ++++++++
 include/linux/firmware/xlnx-zynqmp.h | 3 +++
 2 files changed, 11 insertions(+)

diff --git a/drivers/fpga/zynqmp-fpga.c b/drivers/fpga/zynqmp-fpga.c
index 125743c9797f..0ce34553944b 100644
--- a/drivers/fpga/zynqmp-fpga.c
+++ b/drivers/fpga/zynqmp-fpga.c
@@ -56,6 +56,14 @@ static int zynqmp_fpga_ops_write(struct fpga_manager *mgr,
 
 	wmb(); /* ensure all writes are done before initiate FW call */
 
+	if (priv->flags & FPGA_MGR_ENCRYPTED_BITSTREAM)
+		eemi_flags |= XILINX_ZYNQMP_PM_FPGA_ENCRYPTION_DEVKEY;
+
+	if (priv->flags & FPGA_MGR_DDR_MEM_AUTH_BITSTREAM)
+		eemi_flags |= XILINX_ZYNQMP_PM_FPGA_AUTHENTICATION_DDR;
+	else if (priv->flags & FPGA_MGR_SECURE_MEM_AUTH_BITSTREAM)
+		eemi_flags |= XILINX_ZYNQMP_PM_FPGA_AUTHENTICATION_OCM;
+
 	if (priv->flags & FPGA_MGR_PARTIAL_RECONFIG)
 		eemi_flags |= XILINX_ZYNQMP_PM_FPGA_PARTIAL;
 
diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
index 87114ee645b1..8a4038bf85e2 100644
--- a/include/linux/firmware/xlnx-zynqmp.h
+++ b/include/linux/firmware/xlnx-zynqmp.h
@@ -62,6 +62,9 @@
  */
 #define XILINX_ZYNQMP_PM_FPGA_FULL	0x0U
 #define XILINX_ZYNQMP_PM_FPGA_PARTIAL	BIT(0)
+#define XILINX_ZYNQMP_PM_FPGA_AUTHENTICATION_DDR	BIT(1)
+#define XILINX_ZYNQMP_PM_FPGA_AUTHENTICATION_OCM	BIT(2)
+#define XILINX_ZYNQMP_PM_FPGA_ENCRYPTION_DEVKEY		BIT(4)
 
 enum pm_api_id {
 	PM_GET_API_VERSION = 1,
-- 
2.18.0