[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <AM6PR04MB49666F4A293420EF8E090E8B80A40@AM6PR04MB4966.eurprd04.prod.outlook.com>
Date: Mon, 18 Jan 2021 04:36:55 +0000
From: Aisheng Dong <aisheng.dong@....com>
To: Randy Dunlap <rdunlap@...radead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
CC: kernel test robot <lkp@...el.com>,
Atish Patra <atish.patra@....com>,
Palmer Dabbelt <palmerdabbelt@...gle.com>,
Ard Biesheuvel <ardb@...nel.org>,
Anson Huang <anson.huang@....com>,
Daniel Baluta <daniel.baluta@....com>,
Shawn Guo <shawnguo@...nel.org>
Subject: RE: [PATCH] imx: select SOC_BUS to fix firmware build
> From: Randy Dunlap <rdunlap@...radead.org>
> Sent: Saturday, January 16, 2021 11:33 AM
> Subject: [PATCH] imx: select SOC_BUS to fix firmware build
Patch title probably is better to be:
firmware: imx: xxxxx
Otherwise:
Reviewed-by: Dong Aisheng <aisheng.dong@....com>
Regards
Aisheng
>
> Fix build error in firmware/imx/ selecting SOC_BUS.
>
> riscv32-linux-ld: drivers/firmware/imx/imx-scu-soc.o: in function `.L9':
> imx-scu-soc.c:(.text+0x1b0): undefined reference to `soc_device_register'
>
> Fixes: edbee095fafb ("firmware: imx: add SCU firmware driver support")
> Signed-off-by: Randy Dunlap <rdunlap@...radead.org>
> Reported-by: kernel test robot <lkp@...el.com>
> Cc: Atish Patra <atish.patra@....com>
> Cc: Palmer Dabbelt <palmerdabbelt@...gle.com>
> Cc: Ard Biesheuvel <ardb@...nel.org>
> Cc: Anson Huang <Anson.Huang@....com>
> Cc: Daniel Baluta <daniel.baluta@....com>
> Cc: Shawn Guo <shawnguo@...nel.org>
> Cc: Dong Aisheng <aisheng.dong@....com>
> ---
> drivers/firmware/imx/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> --- linux-next-20210115.orig/drivers/firmware/imx/Kconfig
> +++ linux-next-20210115/drivers/firmware/imx/Kconfig
> @@ -13,6 +13,7 @@ config IMX_DSP
> config IMX_SCU
> bool "IMX SCU Protocol driver"
> depends on IMX_MBOX
> + select SOC_BUS
> help
> The System Controller Firmware (SCFW) is a low-level system function
> which runs on a dedicated Cortex-M core to provide power, clock, and
Powered by blists - more mailing lists