linux-kernel - Re: [PATCH v2 2/2] serial: 8250: Add new 8250-core based Broadcom STB driver

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Message-ID: <CAHp75VdQPQK8jTF3QDKx6mF1QzOg-qiuHrTiojnWn7GskokfoA@mail.gmail.com>
Date:   Tue, 19 Jan 2021 17:21:23 +0200
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     Al Cooper <alcooperx@...il.com>
Cc:     Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        bcm-kernel-feedback-list <bcm-kernel-feedback-list@...adcom.com>,
        devicetree <devicetree@...r.kernel.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Jiri Slaby <jirislaby@...nel.org>,
        "open list:SERIAL DRIVERS" <linux-serial@...r.kernel.org>,
        USB <linux-usb@...r.kernel.org>,
        Masahiro Yamada <yamada.masahiro@...ionext.com>,
        Rob Herring <robh+dt@...nel.org>
Subject: Re: [PATCH v2 2/2] serial: 8250: Add new 8250-core based Broadcom STB driver

On Fri, Jan 15, 2021 at 11:19 PM Al Cooper <alcooperx@...il.com> wrote:
>
> Add a UART driver for the new Broadcom 8250 based STB UART. The new
> UART is backward compatible with the standard 8250, but has some
> additional features. The new features include a high accuracy baud
> rate clock system and DMA support.
>
> The driver will use the new optional BAUD MUX clock to select the best
> one of the four master clocks (81MHz, 108MHz, 64MHz and 48MHz) to feed
> the baud rate selection logic for any requested baud rate.  This allows
> for more accurate BAUD rates when high speed baud rates are selected.
>
> The driver will use the new UART DMA hardware if the UART DMA registers
> are specified in Device Tree "reg" property. The DMA functionality can
> be disabled on kernel boot with the argument:
> "8250_bcm7271.disable_dma=Y".
>
> The driver also set the UPSTAT_AUTOCTS flag when hardware flow control
> is enabled. This flag is needed for UARTs that don't assert a CTS
> changed interrupt when CTS changes and AFE (Hardware Flow Control) is
> enabled.
>
> The driver also contains a workaround for a bug in the Synopsis 8250
> core. The problem is that at high baud rates, the RX partial FIFO
> timeout interrupt can occur but there is no RX data (DR not set in
> the LSR register). In this case the driver will not read the Receive
> Buffer Register, which clears the interrupt, and the system will get
> continuous UART interrupts until the next RX character arrives. The
> fix originally suggested by Synopsis was to read the Receive Buffer
> Register and discard the character when the DR bit in the LSR was
> not set, to clear the interrupt. The problem was that occasionally
> a character would arrive just after the DR bit check and a valid
> character would be discarded. The fix that was added will clear
> receive interrupts to stop the interrupt, deassert RTS to insure
> that no new data can arrive, wait for 1.5 character times for the
> sender to react to RTS and then check for data and either do a dummy
> read or a valid read. Sysfs error counters were also added and were
> used to help create test software that would cause the error condition.
> The counters can be found at:
> /sys/devices/platform/rdb/*serial/rx_bad_timeout_late_char
> /sys/devices/platform/rdb/*serial/rx_bad_timeout_no_char

Brief looking into the code raises several questions:
 - is it driver from the last decade?
 - why it's not using what kernel provides?
 - we have a lot of nice helpers:
   - DMA Engine API
   - BIT() and GENMASK() macros
   - tons of different helpers like regmap API (if you wish to dump
registers via debugfs)

Can you shrink this driver by 20-30% (I truly believe it's possible)
and split DMA driver to drivers/dma (which may already have something
similar there)?

-- 
With Best Regards,
Andy Shevchenko